From ab91c38689850a711b9dc65efee66ffeb29ea0a1 Mon Sep 17 00:00:00 2001
From: Zihao Yu <yuzihao@ict.ac.cn>
Date: Wed, 30 Jan 2019 00:34:04 +0800
Subject: [PATCH] riscv32: move PC_START to 0x80100000 to match the mapping of
 qemu

---
 src/isa/riscv32/include/isa/reg.h | 2 +-
 src/isa/riscv32/init.c            | 5 +++--
 src/isa/riscv32/mmu.c             | 8 ++++++--
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/isa/riscv32/include/isa/reg.h b/src/isa/riscv32/include/isa/reg.h
index 7437bb0d..29555028 100644
--- a/src/isa/riscv32/include/isa/reg.h
+++ b/src/isa/riscv32/include/isa/reg.h
@@ -4,7 +4,7 @@
 #include "common.h"
 #include "memory.h"
 
-#define PC_START IMAGE_START
+#define PC_START (0x80000000u + IMAGE_START)
 
 typedef struct {
   union {
diff --git a/src/isa/riscv32/init.c b/src/isa/riscv32/init.c
index aa96350b..8f357620 100644
--- a/src/isa/riscv32/init.c
+++ b/src/isa/riscv32/init.c
@@ -3,8 +3,9 @@
 // this is not consistent with uint8_t
 // but it is ok since we do not access the array directly
 const uint32_t isa_default_img [] = {
-  0x00002023,  // sw  zero, 0(zero)
-  0x00002503,  // lw  a0,0(zero)
+  0x800002b7,  // lui t0,0x80000
+  0x0002a023,  // sw  zero,0(t0)
+  0x0002a503,  // lw  a0,0(t0)
   0x0000006b,  // nemu_trap
 };
 const long isa_default_img_size = sizeof(isa_default_img);
diff --git a/src/isa/riscv32/mmu.c b/src/isa/riscv32/mmu.c
index 5790e09b..b70c24db 100644
--- a/src/isa/riscv32/mmu.c
+++ b/src/isa/riscv32/mmu.c
@@ -1,10 +1,14 @@
 #include "nemu.h"
 #include "memory/memory.h"
 
+static inline paddr_t va2pa(vaddr_t addr) {
+  return addr & ~0x80000000u;
+}
+
 uint32_t isa_vaddr_read(vaddr_t addr, int len) {
-  return paddr_read(addr, len);
+  return paddr_read(va2pa(addr), len);
 }
 
 void isa_vaddr_write(vaddr_t addr, uint32_t data, int len) {
-  paddr_write(addr, data, len);
+  paddr_write(va2pa(addr), data, len);
 }
-- 
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