From 1d5d6e513812efa4d26ce3ea06a6cf5042a933e8 Mon Sep 17 00:00:00 2001
From: Zihao Yu <yuzihao@ict.ac.cn>
Date: Sat, 14 Sep 2019 23:34:23 +0800
Subject: [PATCH] riscv64,intr: use machine external interrupt

---
 src/isa/riscv64/intr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/isa/riscv64/intr.c b/src/isa/riscv64/intr.c
index 4ee1af74..288bff55 100644
--- a/src/isa/riscv64/intr.c
+++ b/src/isa/riscv64/intr.c
@@ -17,7 +17,8 @@ void raise_intr(uint32_t NO, vaddr_t epc) {
 bool isa_query_intr(void) {
   if (cpu.INTR && mstatus->mie) {
     cpu.INTR = false;
-    raise_intr(0x80000005, cpu.pc);
+    // machine external interrupt
+    raise_intr(0x8000000b, cpu.pc);
     return true;
   }
   return false;
-- 
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