提交 04152e09 编写于 作者: Z Zihao Yu

x86: use pointer to reduce data movement

* byte/word register accessing still need data movement
上级 9905604f
......@@ -11,10 +11,10 @@ typedef struct {
int width;
union {
uint32_t reg;
rtlreg_t *preg;
word_t imm;
sword_t simm;
};
rtlreg_t *preg;
rtlreg_t val;
char str[OP_STR_SIZE];
} Operand;
......
......@@ -82,6 +82,9 @@ typedef struct {
struct ISADecodeInfo {
bool is_operand_size_16;
uint8_t ext_opcode;
const rtlreg_t *mbase;
rtlreg_t mbr;
word_t moff;
};
#define suffix_char(width) ((width) == 4 ? 'l' : ((width) == 1 ? 'b' : ((width) == 2 ? 'w' : '?')))
......
......@@ -31,7 +31,6 @@ static inline void load_addr(DecodeExecState *s, ModR_M *m, Operand *rm) {
sword_t disp = 0;
int disp_size = 4;
int base_reg = -1, index_reg = -1, scale = 0;
rtl_li(s, s0, 0);
if (m->R_M == R_ESP) {
SIB sib;
......@@ -56,19 +55,15 @@ static inline void load_addr(DecodeExecState *s, ModR_M *m, Operand *rm) {
/* has disp */
disp = instr_fetch(&s->seq_pc, disp_size);
if (disp_size == 1) { disp = (int8_t)disp; }
rtl_addi(s, s0, s0, disp);
}
if (base_reg != -1) {
rtl_add(s, s0, s0, &reg_l(base_reg));
}
s->isa.mbase = (base_reg != -1 ? &reg_l(base_reg) : rz);
if (index_reg != -1) {
rtl_shli(s, s1, &reg_l(index_reg), scale);
rtl_add(s, s0, s0, s1);
rtl_add(s, &s->isa.mbr, s->isa.mbase, s1);
s->isa.mbase = &s->isa.mbr;
}
rtl_mv(s, &rm->addr, s0);
s->isa.moff = disp;
#ifdef DEBUG
char disp_buf[16];
......@@ -111,7 +106,8 @@ void read_ModR_M(DecodeExecState *s, Operand *rm, bool load_rm_val, Operand *reg
else {
load_addr(s, &m, rm);
if (load_rm_val) {
rtl_lm(s, &rm->val, &rm->addr, 0, rm->width);
rtl_lm(s, &rm->val, s->isa.mbase, s->isa.moff, rm->width);
rm->preg = &rm->val;
}
}
}
......@@ -96,7 +96,8 @@ static inline make_EHelper(movzx) {
}
static inline make_EHelper(lea) {
operand_write(s, id_dest, &id_src1->addr);
rtl_addi(s, s0, s->isa.mbase, s->isa.moff);
operand_write(s, id_dest, s0);
print_asm_template2(lea);
}
......
#include <monitor/difftest.h>
static make_EHelper(lidt) {
cpu.idtr.limit = vaddr_read(id_dest->addr, 2);
cpu.idtr.base = vaddr_read(id_dest->addr + 2, 4);
word_t addr = *s->isa.mbase + s->isa.moff;
cpu.idtr.limit = vaddr_read(addr, 2);
cpu.idtr.base = vaddr_read(addr + 2, 4);
print_asm_template1(lidt);
}
......
......@@ -6,15 +6,25 @@ void read_ModR_M(DecodeExecState *s, Operand *rm, bool load_rm_val, Operand *reg
static inline void operand_reg(DecodeExecState *s, Operand *op, bool load_val, int r, int width) {
op->type = OP_TYPE_REG;
op->reg = r;
if (width == 4) {
op->preg = &reg_l(r);
} else {
assert(width == 1 || width == 2);
op->preg = &op->val;
if (load_val) rtl_lr(s, &op->val, r, width);
}
print_Dop(op->str, OP_STR_SIZE, "%%%s", reg_name(r, width));
}
static inline void operand_imm(DecodeExecState *s, Operand *op, bool load_val, word_t imm, int width) {
op->type = OP_TYPE_IMM;
op->imm = imm;
if (load_val) {
rtl_li(s, &op->val, imm);
} else op->imm = imm;
op->preg = &op->val;
}
print_Dop(op->str, OP_STR_SIZE, "$0x%x", imm);
}
......@@ -82,12 +92,14 @@ static inline void operand_rm(DecodeExecState *s, Operand *rm, bool load_rm_val,
/* Ob, Ov */
static inline make_DopHelper(O) {
op->type = OP_TYPE_MEM;
rtl_li(s, &op->addr, instr_fetch(&s->seq_pc, 4));
s->isa.moff = instr_fetch(&s->seq_pc, 4);
s->isa.mbase = rz;
if (load_val) {
rtl_lm(s, &op->val, &op->addr, 0, op->width);
rtl_lm(s, &op->val, s->isa.mbase, s->isa.moff, op->width);
op->preg = &op->val;
}
print_Dop(op->str, OP_STR_SIZE, "0x%x", op->addr);
print_Dop(op->str, OP_STR_SIZE, "0x%x", s->isa.moff);
}
/* Eb <- Gb
......@@ -279,6 +291,6 @@ static inline make_DHelper(out_a2dx) {
static inline void operand_write(DecodeExecState *s, Operand *op, rtlreg_t* src) {
if (op->type == OP_TYPE_REG) { rtl_sr(s, op->reg, src, op->width); }
else if (op->type == OP_TYPE_MEM) { rtl_sm(s, &op->addr, 0, src, op->width); }
else if (op->type == OP_TYPE_MEM) { rtl_sm(s, s->isa.mbase, s->isa.moff, src, op->width); }
else { assert(0); }
}
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