From cd49d7353505d8ee10b778a3b3cce74ec7f22947 Mon Sep 17 00:00:00 2001 From: wuyangyong Date: Tue, 20 Dec 2011 08:44:36 +0000 Subject: [PATCH] update bsp lpc2148. git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1851 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- bsp/lpc2148/SConscript | 21 +- bsp/lpc2148/SConstruct | 4 +- bsp/lpc2148/applications/SConscript | 11 + bsp/lpc2148/{ => applications}/application.c | 0 bsp/lpc2148/{ => applications}/startup.c | 0 bsp/lpc2148/drivers/SConscript | 22 ++ bsp/lpc2148/{ => drivers}/board.c | 0 bsp/lpc2148/{ => drivers}/board.h | 5 + bsp/lpc2148/{ => drivers}/dm9000.c | 0 bsp/lpc2148/{ => drivers}/dm9000.h | 0 bsp/lpc2148/{ => drivers}/sd.c | 0 bsp/lpc2148/{ => drivers}/sd.h | 0 bsp/lpc2148/drivers/serial.c | 387 +++++++++++++++++++ bsp/lpc2148/project.Opt | 86 ++--- bsp/lpc2148/project.Uv2 | 82 ++-- bsp/lpc2148/rtconfig.h | 7 +- bsp/lpc2148/rtconfig.py | 7 +- bsp/lpc2148/template.Uv2 | 4 +- 18 files changed, 530 insertions(+), 106 deletions(-) create mode 100644 bsp/lpc2148/applications/SConscript rename bsp/lpc2148/{ => applications}/application.c (100%) rename bsp/lpc2148/{ => applications}/startup.c (100%) create mode 100644 bsp/lpc2148/drivers/SConscript rename bsp/lpc2148/{ => drivers}/board.c (100%) rename bsp/lpc2148/{ => drivers}/board.h (85%) rename bsp/lpc2148/{ => drivers}/dm9000.c (100%) rename bsp/lpc2148/{ => drivers}/dm9000.h (100%) rename bsp/lpc2148/{ => drivers}/sd.c (100%) rename bsp/lpc2148/{ => drivers}/sd.h (100%) create mode 100644 bsp/lpc2148/drivers/serial.c diff --git a/bsp/lpc2148/SConscript b/bsp/lpc2148/SConscript index 2a2a76c135..a425264923 100644 --- a/bsp/lpc2148/SConscript +++ b/bsp/lpc2148/SConscript @@ -1,15 +1,14 @@ -import rtconfig +# for module compiling +import os Import('RTT_ROOT') -from building import * -src_bsp = ['application.c', 'startup.c', 'board.c'] -src_drv = [] +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) - -src = src_bsp + src_drv -CPPPATH = [ GetCurrentDir() ] -CPPDEFINES = [] -group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) - -Return('group') +Return('objs') diff --git a/bsp/lpc2148/SConstruct b/bsp/lpc2148/SConstruct index 2229a86e97..fcf718909e 100644 --- a/bsp/lpc2148/SConstruct +++ b/bsp/lpc2148/SConstruct @@ -6,7 +6,7 @@ RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] from building import * -TARGET = 'obj/rtthread-lpc2148.' + rtconfig.TARGET_EXT +TARGET = 'build/rtthread-lpc214x.' + rtconfig.TARGET_EXT env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, @@ -19,7 +19,7 @@ Export('RTT_ROOT') Export('rtconfig') # prepare building environment -objs = PrepareBuilding(env, RTT_ROOT) +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) # build program env.Program(TARGET, objs) diff --git a/bsp/lpc2148/applications/SConscript b/bsp/lpc2148/applications/SConscript new file mode 100644 index 0000000000..591734409c --- /dev/null +++ b/bsp/lpc2148/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lpc2148/application.c b/bsp/lpc2148/applications/application.c similarity index 100% rename from bsp/lpc2148/application.c rename to bsp/lpc2148/applications/application.c diff --git a/bsp/lpc2148/startup.c b/bsp/lpc2148/applications/startup.c similarity index 100% rename from bsp/lpc2148/startup.c rename to bsp/lpc2148/applications/startup.c diff --git a/bsp/lpc2148/drivers/SConscript b/bsp/lpc2148/drivers/SConscript new file mode 100644 index 0000000000..245bc46b05 --- /dev/null +++ b/bsp/lpc2148/drivers/SConscript @@ -0,0 +1,22 @@ +import copy +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + +# remove no need file. +if GetDepend('RT_USING_LWIP') == False: + src_need_remove = ['dm9000.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +if GetDepend('RT_USING_DFS') == False: + src_need_remove = ['sd.c'] # need remove file list. + SrcRemove(src, src_need_remove) + +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/lpc2148/board.c b/bsp/lpc2148/drivers/board.c similarity index 100% rename from bsp/lpc2148/board.c rename to bsp/lpc2148/drivers/board.c diff --git a/bsp/lpc2148/board.h b/bsp/lpc2148/drivers/board.h similarity index 85% rename from bsp/lpc2148/board.h rename to bsp/lpc2148/drivers/board.h index beec781a62..e65f1780f7 100644 --- a/bsp/lpc2148/board.h +++ b/bsp/lpc2148/drivers/board.h @@ -19,6 +19,11 @@ #define CCLK 60000000 /* Fosc = 12MHz, M = 5 */ #define PCLK 15000000 /* CCLK/4, use default */ +/* RT_USING_UART */ +#define RT_USING_UART1 +#define RT_USING_UART2 +#define RT_UART_RX_BUFFER_SIZE 64 + void rt_hw_board_init(void); #ifdef RT_USING_FINSH diff --git a/bsp/lpc2148/dm9000.c b/bsp/lpc2148/drivers/dm9000.c similarity index 100% rename from bsp/lpc2148/dm9000.c rename to bsp/lpc2148/drivers/dm9000.c diff --git a/bsp/lpc2148/dm9000.h b/bsp/lpc2148/drivers/dm9000.h similarity index 100% rename from bsp/lpc2148/dm9000.h rename to bsp/lpc2148/drivers/dm9000.h diff --git a/bsp/lpc2148/sd.c b/bsp/lpc2148/drivers/sd.c similarity index 100% rename from bsp/lpc2148/sd.c rename to bsp/lpc2148/drivers/sd.c diff --git a/bsp/lpc2148/sd.h b/bsp/lpc2148/drivers/sd.h similarity index 100% rename from bsp/lpc2148/sd.h rename to bsp/lpc2148/drivers/sd.h diff --git a/bsp/lpc2148/drivers/serial.c b/bsp/lpc2148/drivers/serial.c new file mode 100644 index 0000000000..e8f7a49cb4 --- /dev/null +++ b/bsp/lpc2148/drivers/serial.c @@ -0,0 +1,387 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://openlab.rt-thread.com/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2006-08-23 Bernard first version + */ + +#include +#include + +#include "lpc214x.h" +#include "board.h" + +/* serial hardware register */ +#define REG8(d) (*((volatile unsigned char *)(d))) +#define REG32(d) (*((volatile unsigned long *)(d))) + +#define UART_RBR(base) REG8(base + 0x00) +#define UART_THR(base) REG8(base + 0x00) +#define UART_IER(base) REG32(base + 0x04) +#define UART_IIR(base) REG32(base + 0x08) +#define UART_FCR(base) REG8(base + 0x08) +#define UART_LCR(base) REG8(base + 0x0C) +#define UART_MCR(base) REG8(base + 0x10) +#define UART_LSR(base) REG8(base + 0x14) +#define UART_MSR(base) REG8(base + 0x18) +#define UART_SCR(base) REG8(base + 0x1C) +#define UART_DLL(base) REG8(base + 0x00) +#define UART_DLM(base) REG8(base + 0x04) +#define UART_ACR(base) REG32(base + 0x20) +#define UART_FDR(base) REG32(base + 0x28) +#define UART_TER(base) REG8(base + 0x30) + +/* LPC serial device */ +struct rt_lpcserial +{ + /* inherit from device */ + struct rt_device parent; + + rt_uint32_t hw_base; + rt_uint32_t irqno; + rt_uint32_t baudrate; + + /* reception field */ + rt_uint16_t save_index, read_index; + rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; +}; + +#ifdef RT_USING_UART1 +struct rt_lpcserial serial1; +#endif +#ifdef RT_USING_UART2 +struct rt_lpcserial serial2; +#endif + +void rt_hw_serial_init(void); + +#define U0PINS 0x00000005 + +void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial) +{ + UNUSED rt_uint32_t iir; + + RT_ASSERT(lpc_serial != RT_NULL) + + if (UART_LSR(lpc_serial->hw_base) & 0x01) + { + rt_base_t level; + + while (UART_LSR(lpc_serial->hw_base) & 0x01) + { + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* read character */ + lpc_serial->rx_buffer[lpc_serial->save_index] = + UART_RBR(lpc_serial->hw_base); + lpc_serial->save_index ++; + if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE) + lpc_serial->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (lpc_serial->save_index == lpc_serial->read_index) + { + lpc_serial->read_index ++; + if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE) + lpc_serial->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* invoke callback */ + if(lpc_serial->parent.rx_indicate != RT_NULL) + { + lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1); + } + } + + /* clear interrupt source */ + iir = UART_IIR(lpc_serial->hw_base); + + /* acknowledge Interrupt */ + VICVectAddr = 0; +} + +#ifdef RT_USING_UART1 +void rt_hw_uart_isr_1(int irqno) +{ + /* get lpc serial device */ + rt_hw_uart_isr(&serial1); +} +#endif + +#ifdef RT_USING_UART2 +void rt_hw_uart_isr_2(int irqno) +{ + /* get lpc serial device */ + rt_hw_uart_isr(&serial2); +} +#endif + +/** + * @addtogroup LPC214x + */ +/*@{*/ + +static rt_err_t rt_serial_init (rt_device_t dev) +{ + return RT_EOK; +} + +static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) +{ + struct rt_lpcserial* lpc_serial; + lpc_serial = (struct rt_lpcserial*) dev; + + RT_ASSERT(lpc_serial != RT_NULL); + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* init UART rx interrupt */ + UART_IER(lpc_serial->hw_base) = 0x01; + + /* install ISR */ + if (lpc_serial->irqno == UART0_INT) + { +#ifdef RT_USING_UART1 + rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_1, RT_NULL); +#endif + } + else + { +#ifdef RT_USING_UART2 + rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_2, RT_NULL); +#endif + } + + rt_hw_interrupt_umask(lpc_serial->irqno); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_close(rt_device_t dev) +{ + struct rt_lpcserial* lpc_serial; + lpc_serial = (struct rt_lpcserial*) dev; + + RT_ASSERT(lpc_serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* disable UART rx interrupt */ + UART_IER(lpc_serial->hw_base) = 0x00; + } + + return RT_EOK; +} + +static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev; + RT_ASSERT(lpc_serial != RT_NULL); + + /* point to buffer */ + ptr = (rt_uint8_t*) buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + while (size) + { + /* interrupt receive */ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (lpc_serial->read_index != lpc_serial->save_index) + { + *ptr = lpc_serial->rx_buffer[lpc_serial->read_index]; + + lpc_serial->read_index ++; + if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE) + lpc_serial->read_index = 0; + } + else + { + /* no data in rx buffer */ + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + ptr ++; size --; + } + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_RX) + { + /* not support right now */ + RT_ASSERT(0); + } + + /* polling mode */ + while (size && (UART_LSR(lpc_serial->hw_base) & 0x01)) + { + /* Read Character */ + *ptr = UART_RBR(lpc_serial->hw_base); + + ptr ++; + size --; + } + + return (rt_size_t)ptr - (rt_size_t)buffer; +} + +static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + struct rt_lpcserial* lpc_serial; + char *ptr; + + lpc_serial = (struct rt_lpcserial*) dev; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* not support */ + RT_ASSERT(0); + } + + /* polling write */ + ptr = (char *)buffer; + + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); + UART_THR(lpc_serial->hw_base) = '\r'; + } + + while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); + UART_THR(lpc_serial->hw_base) = *ptr; + + ptr ++; + size --; + } + } + else + { + while (size) + { + while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); + UART_THR(lpc_serial->hw_base) = *ptr; + + ptr ++; + size --; + } + } + + return (rt_size_t) ptr - (rt_size_t) buffer; +} + +void rt_hw_serial_init(void) +{ + struct rt_lpcserial* lpc_serial; + +#ifdef RT_USING_UART1 + lpc_serial = &serial1; + + lpc_serial->parent.type = RT_Device_Class_Char; + + lpc_serial->hw_base = 0xE000C000; + lpc_serial->baudrate = 115200; + lpc_serial->irqno = UART0_INT; + + rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer)); + lpc_serial->read_index = lpc_serial->save_index = 0; + + /* Enable UART0 RxD and TxD pins */ + PINSEL0 |= 0x05; + + /* 8 bits, no Parity, 1 Stop bit */ + UART_LCR(lpc_serial->hw_base) = 0x83; + + /* Setup Baudrate */ + UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF; + UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; + + /* DLAB = 0 */ + UART_LCR(lpc_serial->hw_base) = 0x03; + + lpc_serial->parent.init = rt_serial_init; + lpc_serial->parent.open = rt_serial_open; + lpc_serial->parent.close = rt_serial_close; + lpc_serial->parent.read = rt_serial_read; + lpc_serial->parent.write = rt_serial_write; + lpc_serial->parent.control = rt_serial_control; + lpc_serial->parent.user_data = RT_NULL; + + rt_device_register(&lpc_serial->parent, + "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif + +#ifdef RT_USING_UART2 + lpc_serial = &serial2; + + lpc_serial->parent.type = RT_Device_Class_Char; + + lpc_serial->hw_base = 0xE0010000; + lpc_serial->baudrate = 115200; + lpc_serial->irqno = UART1_INT; + + rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer)); + lpc_serial->read_index = lpc_serial->save_index = 0; + + /* Enable UART1 RxD and TxD pins */ + PINSEL0 |= 0x05 << 16; + + /* 8 bits, no Parity, 1 Stop bit */ + UART_LCR(lpc_serial->hw_base) = 0x83; + + /* Setup Baudrate */ + UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF; + UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; + + /* DLAB = 0 */ + UART_LCR(lpc_serial->hw_base) = 0x03; + + lpc_serial->parent.init = rt_serial_init; + lpc_serial->parent.open = rt_serial_open; + lpc_serial->parent.close = rt_serial_close; + lpc_serial->parent.read = rt_serial_read; + lpc_serial->parent.write = rt_serial_write; + lpc_serial->parent.control = rt_serial_control; + lpc_serial->parent.user_data = RT_NULL; + + rt_device_register(&lpc_serial->parent, + "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif +} + +/*@}*/ diff --git a/bsp/lpc2148/project.Opt b/bsp/lpc2148/project.Opt index e5bac6fcf2..58389990b4 100644 --- a/bsp/lpc2148/project.Opt +++ b/bsp/lpc2148/project.Opt @@ -11,49 +11,47 @@ DaveTm { 0,0,0,0,0,0,0,0 } Target (rtthread-lpc2148), 0x0004 // Tools: 'ARM-ADS' -GRPOPT 1,(Startup),0,0,0 -GRPOPT 2,(Kernel),0,0,0 -GRPOPT 3,(LPC214X),0,0,0 -GRPOPT 4,(finsh),0,0,0 +GRPOPT 1,(Applications),0,0,0 +GRPOPT 2,(Drivers),0,0,0 +GRPOPT 3,(Kernel),0,0,0 +GRPOPT 4,(LPC214X),0,0,0 +GRPOPT 5,(finsh),0,0,0 -OPTFFF 1,1,1,0,0,0,0,0,<.\application.c> -OPTFFF 1,2,1,1073741826,0,124,124,0,<.\startup.c> { 44,0,0,0,2,0,0,0,3,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,0,0,0,0,0,0,0,0,117,3,0,0,254,0,0,0 } -OPTFFF 1,3,1,0,0,0,0,0,<.\board.c> -OPTFFF 2,4,1,0,0,0,0,0,<..\..\src\clock.c> -OPTFFF 2,5,1,0,0,0,0,0,<..\..\src\device.c> -OPTFFF 2,6,1,0,0,0,0,0,<..\..\src\idle.c> -OPTFFF 2,7,1,0,0,0,0,0,<..\..\src\ipc.c> -OPTFFF 2,8,1,0,0,0,0,0,<..\..\src\irq.c> -OPTFFF 2,9,1,0,0,0,0,0,<..\..\src\kservice.c> -OPTFFF 2,10,1,0,0,0,0,0,<..\..\src\mem.c> -OPTFFF 2,11,1,0,0,0,0,0,<..\..\src\mempool.c> -OPTFFF 2,12,1,0,0,0,0,0,<..\..\src\module.c> -OPTFFF 2,13,1,0,0,0,0,0,<..\..\src\object.c> -OPTFFF 2,14,1,0,0,0,0,0,<..\..\src\rtm.c> -OPTFFF 2,15,1,0,0,0,0,0,<..\..\src\scheduler.c> -OPTFFF 2,16,1,0,0,0,0,0,<..\..\src\slab.c> -OPTFFF 2,17,1,0,0,0,0,0,<..\..\src\thread.c> -OPTFFF 2,18,1,0,0,0,0,0,<..\..\src\timer.c> -OPTFFF 3,19,1,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\cpuport.c> -OPTFFF 3,20,1,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\serial.c> -OPTFFF 3,21,2,100663296,0,0,0,0,<..\..\libcpu\arm\lpc214x\context_rvds.S> -OPTFFF 3,22,2,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\start_rvds.S> -OPTFFF 3,23,1,0,0,0,0,0,<..\..\libcpu\arm\common\backtrace.c> -OPTFFF 3,24,1,0,0,0,0,0,<..\..\libcpu\arm\common\div0.c> -OPTFFF 3,25,1,0,0,0,0,0,<..\..\libcpu\arm\common\showmem.c> -OPTFFF 4,26,1,0,0,0,0,0,<..\..\components\finsh\cmd.c> -OPTFFF 4,27,1,0,0,0,0,0,<..\..\components\finsh\finsh_compiler.c> -OPTFFF 4,28,1,0,0,0,0,0,<..\..\components\finsh\finsh_error.c> -OPTFFF 4,29,1,0,0,0,0,0,<..\..\components\finsh\finsh_heap.c> -OPTFFF 4,30,1,0,0,0,0,0,<..\..\components\finsh\finsh_init.c> -OPTFFF 4,31,1,0,0,0,0,0,<..\..\components\finsh\finsh_node.c> -OPTFFF 4,32,1,0,0,0,0,0,<..\..\components\finsh\finsh_ops.c> -OPTFFF 4,33,1,0,0,0,0,0,<..\..\components\finsh\finsh_parser.c> -OPTFFF 4,34,1,0,0,0,0,0,<..\..\components\finsh\finsh_token.c> -OPTFFF 4,35,1,0,0,0,0,0,<..\..\components\finsh\finsh_var.c> -OPTFFF 4,36,1,0,0,0,0,0,<..\..\components\finsh\finsh_vm.c> -OPTFFF 4,37,1,0,0,0,0,0,<..\..\components\finsh\shell.c> -OPTFFF 4,38,1,0,0,0,0,0,<..\..\components\finsh\symbol.c> +OPTFFF 1,1,1,0,0,0,0,0, +OPTFFF 1,2,1,0,0,0,0,0, +OPTFFF 2,3,1,0,0,0,0,0, +OPTFFF 2,4,1,0,0,0,0,0, +OPTFFF 3,5,1,0,0,0,0,0,<..\..\src\device.c> +OPTFFF 3,6,1,0,0,0,0,0,<..\..\src\thread.c> +OPTFFF 3,7,1,0,0,0,0,0,<..\..\src\scheduler.c> +OPTFFF 3,8,1,0,0,0,0,0,<..\..\src\timer.c> +OPTFFF 3,9,1,0,0,0,0,0,<..\..\src\irq.c> +OPTFFF 3,10,1,0,0,0,0,0,<..\..\src\kservice.c> +OPTFFF 3,11,1,0,0,0,0,0,<..\..\src\clock.c> +OPTFFF 3,12,1,0,0,0,0,0,<..\..\src\object.c> +OPTFFF 3,13,1,0,0,0,0,0,<..\..\src\mempool.c> +OPTFFF 3,14,1,0,0,0,0,0,<..\..\src\ipc.c> +OPTFFF 3,15,1,0,0,0,0,0,<..\..\src\idle.c> +OPTFFF 3,16,1,0,0,0,0,0,<..\..\src\mem.c> +OPTFFF 4,17,1,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\cpuport.c> +OPTFFF 4,18,2,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\context_rvds.S> +OPTFFF 4,19,2,0,0,0,0,0,<..\..\libcpu\arm\lpc214x\start_rvds.S> +OPTFFF 4,20,1,0,0,0,0,0,<..\..\libcpu\arm\common\backtrace.c> +OPTFFF 4,21,1,0,0,0,0,0,<..\..\libcpu\arm\common\div0.c> +OPTFFF 4,22,1,0,0,0,0,0,<..\..\libcpu\arm\common\showmem.c> +OPTFFF 5,23,1,0,0,0,0,0,<..\..\components\finsh\cmd.c> +OPTFFF 5,24,1,0,0,0,0,0,<..\..\components\finsh\finsh_compiler.c> +OPTFFF 5,25,1,0,0,0,0,0,<..\..\components\finsh\finsh_error.c> +OPTFFF 5,26,1,0,0,0,0,0,<..\..\components\finsh\finsh_heap.c> +OPTFFF 5,27,1,0,0,0,0,0,<..\..\components\finsh\finsh_init.c> +OPTFFF 5,28,1,0,0,0,0,0,<..\..\components\finsh\finsh_node.c> +OPTFFF 5,29,1,0,0,0,0,0,<..\..\components\finsh\finsh_ops.c> +OPTFFF 5,30,1,0,0,0,0,0,<..\..\components\finsh\finsh_parser.c> +OPTFFF 5,31,1,0,0,0,0,0,<..\..\components\finsh\finsh_token.c> +OPTFFF 5,32,1,0,0,0,0,0,<..\..\components\finsh\finsh_var.c> +OPTFFF 5,33,1,0,0,0,0,0,<..\..\components\finsh\finsh_vm.c> +OPTFFF 5,34,1,0,0,0,0,0,<..\..\components\finsh\shell.c> +OPTFFF 5,35,1,0,0,0,0,0,<..\..\components\finsh\symbol.c> TARGOPT 1, (rtthread-lpc2148) @@ -67,8 +65,8 @@ TARGOPT 1, (rtthread-lpc2148) OPTFL 1,0,1 OPTAX 0 OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148) - OPTDBG 48126,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() - OPTKEY 0,(UL2ARM)(-UV0168AVR -O14 -S1 -C0 -N00("ARM7TDMI-S Core") -D00(4F1F0F0F) -L00(4) -FO19 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000) + OPTDBG 49150,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() + OPTKEY 0,(UL2ARM)(-UV0168AVR -O14 -S1 -C0 -N00("ARM7TDMI-S Core") -D00(4F1F0F0F) -L00(4) -FO27 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000) OPTKEY 0,(DLGDARM)((134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(153=-1,-1,-1,-1,0)(154=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(145=-1,-1,-1,-1,0)(147=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(137=-1,-1,-1,-1,0)(138=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(146=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(141=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(143=-1,-1,-1,-1,0)(144=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0)) OPTKEY 0,(ARMDBGFLAGS)(-T5F) OPTDF 0x94 diff --git a/bsp/lpc2148/project.Uv2 b/bsp/lpc2148/project.Uv2 index a0ee74a332..e07e514b16 100644 --- a/bsp/lpc2148/project.Uv2 +++ b/bsp/lpc2148/project.Uv2 @@ -3,49 +3,47 @@ Target (rtthread-lpc2148), 0x0004 // Tools: 'ARM-ADS' -Group (Startup) +Group (Applications) +Group (Drivers) Group (Kernel) Group (LPC214X) Group (finsh) -File 1,1,<.\application.c> -File 1,1,<.\startup.c> -File 1,1,<.\board.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\module.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\rtm.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\slab.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 3,1,<..\..\libcpu\arm\lpc214x\cpuport.c> -File 3,1,<..\..\libcpu\arm\lpc214x\serial.c> -File 3,2,<..\..\libcpu\arm\lpc214x\context_rvds.S> -File 3,2,<..\..\libcpu\arm\lpc214x\start_rvds.S> -File 3,1,<..\..\libcpu\arm\common\backtrace.c> -File 3,1,<..\..\libcpu\arm\common\div0.c> -File 3,1,<..\..\libcpu\arm\common\showmem.c> -File 4,1,<..\..\components\finsh\cmd.c> -File 4,1,<..\..\components\finsh\finsh_compiler.c> -File 4,1,<..\..\components\finsh\finsh_error.c> -File 4,1,<..\..\components\finsh\finsh_heap.c> -File 4,1,<..\..\components\finsh\finsh_init.c> -File 4,1,<..\..\components\finsh\finsh_node.c> -File 4,1,<..\..\components\finsh\finsh_ops.c> -File 4,1,<..\..\components\finsh\finsh_parser.c> -File 4,1,<..\..\components\finsh\finsh_token.c> -File 4,1,<..\..\components\finsh\finsh_var.c> -File 4,1,<..\..\components\finsh\finsh_vm.c> -File 4,1,<..\..\components\finsh\shell.c> -File 4,1,<..\..\components\finsh\symbol.c> +File 1,1, +File 1,1, +File 2,1, +File 2,1, +File 3,1,<..\..\src\device.c> +File 3,1,<..\..\src\thread.c> +File 3,1,<..\..\src\scheduler.c> +File 3,1,<..\..\src\timer.c> +File 3,1,<..\..\src\irq.c> +File 3,1,<..\..\src\kservice.c> +File 3,1,<..\..\src\clock.c> +File 3,1,<..\..\src\object.c> +File 3,1,<..\..\src\mempool.c> +File 3,1,<..\..\src\ipc.c> +File 3,1,<..\..\src\idle.c> +File 3,1,<..\..\src\mem.c> +File 4,1,<..\..\libcpu\arm\lpc214x\cpuport.c> +File 4,2,<..\..\libcpu\arm\lpc214x\context_rvds.S> +File 4,2,<..\..\libcpu\arm\lpc214x\start_rvds.S> +File 4,1,<..\..\libcpu\arm\common\backtrace.c> +File 4,1,<..\..\libcpu\arm\common\div0.c> +File 4,1,<..\..\libcpu\arm\common\showmem.c> +File 5,1,<..\..\components\finsh\cmd.c> +File 5,1,<..\..\components\finsh\finsh_compiler.c> +File 5,1,<..\..\components\finsh\finsh_error.c> +File 5,1,<..\..\components\finsh\finsh_heap.c> +File 5,1,<..\..\components\finsh\finsh_init.c> +File 5,1,<..\..\components\finsh\finsh_node.c> +File 5,1,<..\..\components\finsh\finsh_ops.c> +File 5,1,<..\..\components\finsh\finsh_parser.c> +File 5,1,<..\..\components\finsh\finsh_token.c> +File 5,1,<..\..\components\finsh\finsh_var.c> +File 5,1,<..\..\components\finsh\finsh_vm.c> +File 5,1,<..\..\components\finsh\shell.c> +File 5,1,<..\..\components\finsh\symbol.c> Options 1,0,0 // Target 'rtthread-lpc2148' @@ -73,7 +71,7 @@ Options 1,0,0 // Target 'rtthread-lpc2148' EnvReg (Philips\) OrgReg (Philips\) TgStat=16 - OutDir (.\obj\) + OutDir (.\build\) OutName (rtthread-lpc2148) GenApp=1 GenLib=0 @@ -106,7 +104,7 @@ Options 1,0,0 // Target 'rtthread-lpc2148' ADSCMISC () ADSCDEFN () ADSCUDEF () - ADSCINCD (..\..\include;..\..\libcpu\arm\lpc214x;..\..\libcpu\arm\common;..\..\components\finsh;.) + ADSCINCD (..\..\include;drivers;.;applications;..\..\libcpu\arm\lpc214x;..\..\libcpu\arm\common;..\..\components\finsh) ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSAMISC () ADSADEFN () @@ -131,7 +129,7 @@ Options 1,0,0 // Target 'rtthread-lpc2148' ADSLDIF () ADSLDDW () OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148) - OPTDBG 48126,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() + OPTDBG 49150,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()() FLASH1 { 9,0,0,0,1,0,0,0,0,16,0,0,0,0,0,0,0,0,0,0 } FLASH2 (BIN\UL2ARM.DLL) FLASH3 ("LPC210x_ISP.EXE" ("#H" ^X $D COM1: 38400 1)) diff --git a/bsp/lpc2148/rtconfig.h b/bsp/lpc2148/rtconfig.h index c4ebc244f8..77b81d4b48 100644 --- a/bsp/lpc2148/rtconfig.h +++ b/bsp/lpc2148/rtconfig.h @@ -15,10 +15,13 @@ #define RT_TICK_PER_SECOND 100 /* SECTION: RT_DEBUG */ -/* Thread Debug*/ +/* Thread Debug */ +#define RT_DEBUG /* #define RT_THREAD_DEBUG */ -/* Using Hook*/ +#define RT_USING_OVERFLOW_CHECK + +/* Using Hook */ #define RT_USING_HOOK /* SECTION: IPC */ diff --git a/bsp/lpc2148/rtconfig.py b/bsp/lpc2148/rtconfig.py index 076712cb52..7beb4ed938 100644 --- a/bsp/lpc2148/rtconfig.py +++ b/bsp/lpc2148/rtconfig.py @@ -1,7 +1,7 @@ # toolchains options ARCH='arm' CPU='lpc214x' -CROSS_TOOL='gcc' +CROSS_TOOL='keil' if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' @@ -28,7 +28,7 @@ if PLATFORM == 'gcc': DEVICE = ' -mcpu=arm7tdmi-s' CFLAGS = DEVICE + ' -DRT_USING_MINILIBC' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' - LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-lpc2148.map,-cref,-u,_start -T lpc2148_rom.ld' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-lpc214x.map,-cref,-u,_start -T lpc2148_rom.ld' CPATH = '' LPATH = '' @@ -76,11 +76,12 @@ elif PLATFORM == 'iar': LINK = 'ilinkarm' TARGET_EXT = 'out' - DEVICE = ' --cpu DARMSTM --thumb' + DEVICE = ' --cpu DARMP1 --thumb' CFLAGS = '' AFLAGS = '' LFLAGS = ' --config lpc214x_flash.icf' EXEC_PATH += '/arm/bin/' + RT_USING_MINILIBC = False POST_ACTION = '' diff --git a/bsp/lpc2148/template.Uv2 b/bsp/lpc2148/template.Uv2 index 3c41760229..f13d22b1c9 100644 --- a/bsp/lpc2148/template.Uv2 +++ b/bsp/lpc2148/template.Uv2 @@ -31,14 +31,14 @@ Options 1,0,0 // Target 'rtthread-lpc2148' EnvReg (Philips\) OrgReg (Philips\) TgStat=16 - OutDir (.\obj\) + OutDir (.\build\) OutName (rtthread-lpc2148) GenApp=1 GenLib=0 GenHex=0 Debug=1 Browse=1 - LstDir (.\obj\) + LstDir (.\build\) HexSel=1 MG32K=0 TGMORE=0 -- GitLab