diff --git a/bsp/tm4c129x/applications/application.c b/bsp/tm4c129x/applications/application.c index 671511c36d5ac7ad902640515d6e895d26674672..e199702e8a6b77c7f16d7bc27793d635bfd2e27c 100644 --- a/bsp/tm4c129x/applications/application.c +++ b/bsp/tm4c129x/applications/application.c @@ -1,11 +1,7 @@ /* - * File : application.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2014, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/tm4c129x/applications/board.c b/bsp/tm4c129x/applications/board.c index 382cf28cf8b1191ca740a6fae4e2e6955b3bed67..26ada2f8f8737c1103c1db59816aff621e1ca6d7 100644 --- a/bsp/tm4c129x/applications/board.c +++ b/bsp/tm4c129x/applications/board.c @@ -1,11 +1,7 @@ /* - * File : board.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2013 RT-Thread Develop Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -72,10 +68,10 @@ void rt_hw_board_init() int rt_hw_cpu_init(void) { MAP_IntMasterDisable(); - IntRegister(FAULT_HARD, HardFault_Handler); + IntRegister(FAULT_HARD, HardFault_Handler); IntRegister(FAULT_PENDSV, PendSV_Handler); IntRegister(FAULT_SYSTICK, SysTick_Handler); - + // Enable lazy stacking for interrupt handlers. This allows floating-point // instructions to be used within interrupt handlers, but at the expense of // extra stack usage. @@ -91,7 +87,7 @@ int rt_hw_cpu_init(void) MAP_SysTickDisable(); MAP_SysTickPeriodSet(SystemCoreClock/ RT_TICK_PER_SECOND - 1); MAP_SysTickIntEnable(); - MAP_SysTickEnable(); + MAP_SysTickEnable(); return 0; } diff --git a/bsp/tm4c129x/applications/board.h b/bsp/tm4c129x/applications/board.h index 20b038db3061b9d8c86ba46f59ea7decdc880a88..ea1f7d4de4cd15db7e2d4c2dbb4905cc11d0ce55 100644 --- a/bsp/tm4c129x/applications/board.h +++ b/bsp/tm4c129x/applications/board.h @@ -1,11 +1,7 @@ /* - * File : board.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes diff --git a/bsp/tm4c129x/drivers/drv_eth.c b/bsp/tm4c129x/drivers/drv_eth.c index 9545620d8d1387747be8bcaacb894638cf92c046..12d9f88f3e09b4756eb9c837c367b562e11ed65c 100644 --- a/bsp/tm4c129x/drivers/drv_eth.c +++ b/bsp/tm4c129x/drivers/drv_eth.c @@ -1,11 +1,7 @@ /* - * File : drv_eth.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -246,7 +242,7 @@ volatile uint32_t g_ui32AbnormalInts; ((uint32_t)(ptr) < 0x20070000)) -typedef struct +typedef struct { /* inherit from ethernet device */ struct eth_device parent; @@ -254,7 +250,7 @@ typedef struct /* for rx_thread async get pbuf */ rt_mailbox_t rx_pbuf_mb; } net_device; -typedef net_device* net_device_t; +typedef net_device* net_device_t; static char rx_pbuf_mb_pool[8*4]; static struct rt_mailbox eth_rx_pbuf_mb; @@ -570,7 +566,7 @@ tivaif_transmit(net_device_t dev, struct pbuf *p) /* Get our state data from the netif structure we were passed. */ //pIF = (tStellarisIF *)psNetif->state; pIF = dev->dma_if; - + /* Make sure that the transmit descriptors are not all in use */ pDesc = &(pIF->pTxDescList->pDescriptors[pIF->pTxDescList->ui32Write]); if(pDesc->pBuf) @@ -955,7 +951,7 @@ tivaif_process_phy_interrupt(net_device_t dev) */ ui16Val = EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_MISR1); - /* + /* * Dummy read PHY REG EPHY_BMSR, it will force update the EPHY_STS register */ EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMSR); @@ -1170,38 +1166,38 @@ void lwIPEthernetIntHandler(void) } -// OUI:00-12-37 (hex) Texas Instruments, only for test +// OUI:00-12-37 (hex) Texas Instruments, only for test static int tiva_eth_mac_addr_init(void) { - int retVal =0; + int retVal =0; uint32_t ulUser[2]; uint8_t mac_addr[6]; - + MAP_FlashUserGet(&ulUser[0], &ulUser[1]); if((ulUser[0] == 0xffffffff) || (ulUser[1] == 0xffffffff)) { rt_kprintf("Fail to get mac address from eeprom.\n"); rt_kprintf("Using default mac address\n"); - // OUI:00-12-37 (hex) Texas Instruments, only for test - // Configure the hardware MAC address + // OUI:00-12-37 (hex) Texas Instruments, only for test + // Configure the hardware MAC address ulUser[0] = 0x00371200; ulUser[1] = 0x00563412; - //FlashUserSet(ulUser0, ulUser1); + //FlashUserSet(ulUser0, ulUser1); retVal =-1; } - - + + //Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC //address needed to program the hardware registers, then program the MAC //address into the Ethernet Controller registers. - + mac_addr[0] = ((ulUser[0] >> 0) & 0xff); mac_addr[1] = ((ulUser[0] >> 8) & 0xff); mac_addr[2] = ((ulUser[0] >> 16) & 0xff); mac_addr[3] = ((ulUser[1] >> 0) & 0xff); mac_addr[4] = ((ulUser[1] >> 8) & 0xff); mac_addr[5] = ((ulUser[1] >> 16) & 0xff); - + // // Program the hardware with its MAC address (for filtering). // @@ -1219,7 +1215,7 @@ static int tiva_eth_mac_addr_init(void) MAP_GPIOPinConfigure(GPIO_PF4_EN0LED1); GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_0); GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_4); - + // // Enable the ethernet peripheral. // @@ -1288,7 +1284,7 @@ static int tiva_eth_mac_addr_init(void) EMAC_MODE_TX_STORE_FORWARD | EMAC_MODE_TX_THRESHOLD_64_BYTES | EMAC_MODE_RX_THRESHOLD_64_BYTES), 0); - + EMACIntRegister(EMAC0_BASE, lwIPEthernetIntHandler); } @@ -1297,7 +1293,7 @@ static rt_err_t eth_dev_init(rt_device_t device) { net_device_t net_dev = (net_device_t)device; struct netif *psNetif = (net_dev->parent.netif); - + LWIP_ASSERT("psNetif != NULL", (psNetif != NULL)); #if LWIP_NETIF_HOSTNAME @@ -1311,7 +1307,7 @@ static rt_err_t eth_dev_init(rt_device_t device) * of bits per second. */ //NETIF_INIT_SNMP(psNetif, snmp_ifType_ethernet_csmacd, 1000000); - + net_dev->dma_if = &g_StellarisIFData; /* Remember our MAC address. */ @@ -1329,9 +1325,9 @@ static rt_err_t eth_dev_control(rt_device_t dev, int cmd, void *args) { case NIOCTL_GADDR: /* get mac address */ - if(args) + if(args) MAP_EMACAddrGet(EMAC0_BASE, 0, (uint8_t*)args); - else + else return -RT_ERROR; break; @@ -1379,7 +1375,7 @@ static struct pbuf* eth_dev_rx(rt_device_t dev) rt_uint32_t temp =0; net_device_t net_dev = (net_device_t)dev; result = rt_mb_recv(net_dev->rx_pbuf_mb, (rt_ubase_t *)&temp, RT_WAITING_NO); - + return (result == RT_EOK)? (struct pbuf*)temp : RT_NULL; } @@ -1388,7 +1384,7 @@ int rt_hw_tiva_eth_init(void) rt_err_t result; /* Clock GPIO and etc */ - tiva_eth_lowlevel_init(); + tiva_eth_lowlevel_init(); tiva_eth_mac_addr_init(); /* init rt-thread device interface */ @@ -1400,14 +1396,14 @@ int rt_hw_tiva_eth_init(void) eth_dev->parent.parent.control = eth_dev_control; eth_dev->parent.eth_rx = eth_dev_rx; eth_dev->parent.eth_tx = eth_dev_tx; - + result = rt_mb_init(ð_rx_pbuf_mb, "epbuf", &rx_pbuf_mb_pool[0], sizeof(rx_pbuf_mb_pool)/4, RT_IPC_FLAG_FIFO); RT_ASSERT(result == RT_EOK); eth_dev->rx_pbuf_mb = ð_rx_pbuf_mb; - - + + result = eth_device_init(&(eth_dev->parent), "e0"); return result; } @@ -1433,13 +1429,13 @@ void PHY_Write(uint8_t addr , uint16_t data) } FINSH_FUNCTION_EXPORT(PHY_Write, (add, data)); -void PHY_SetAdd(uint8_t addr0, uint8_t addr1, uint8_t addr2, +void PHY_SetAdd(uint8_t addr0, uint8_t addr1, uint8_t addr2, uint8_t addr3, uint8_t addr4, uint8_t addr5) { uint32_t ulUser[2]; ulUser[0] = (((addr2<<8)|addr1)<<8)|addr0; ulUser[1] = (((addr5<<8)|addr4)<<8)|addr3; - + MAP_FlashUserSet(ulUser[0], ulUser[1]); MAP_FlashUserSave(); rt_kprintf("Save to EEPROM. please reboot."); diff --git a/bsp/tm4c129x/drivers/drv_eth.h b/bsp/tm4c129x/drivers/drv_eth.h index 54431405fe0797ce399c0b8b0e763c3cb0a18792..2fa81e4f0453ff955d57692b76b48aeff032712f 100644 --- a/bsp/tm4c129x/drivers/drv_eth.h +++ b/bsp/tm4c129x/drivers/drv_eth.h @@ -1,17 +1,13 @@ /* - * File : drv_eth.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2014-07-25 ArdaFu Port to TM4C129X */ - + #ifndef __TIVA_ETH_H__ #define __TIVA_ETH_H__ diff --git a/bsp/tm4c129x/drivers/drv_uart.c b/bsp/tm4c129x/drivers/drv_uart.c index ef95144af15667055cc6661c0652ebaac9d0d07b..d1b26f30026916bf4b3188778cecdecea47f0938 100644 --- a/bsp/tm4c129x/drivers/drv_uart.c +++ b/bsp/tm4c129x/drivers/drv_uart.c @@ -1,11 +1,7 @@ /* - * File : drv_uart.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes @@ -34,75 +30,75 @@ typedef struct hw_uart_device #define mUartGetHwPtr(serial) ((hw_uart_t*)(serial->parent.user_data)) static rt_err_t hw_configure(struct rt_serial_device *serial, struct serial_configure *cfg) -{ - uint32_t config = 0; - hw_uart_t* uart; +{ + uint32_t config = 0; + hw_uart_t* uart; RT_ASSERT(serial != RT_NULL); uart = mUartGetHwPtr(serial); - MAP_UARTDisable(uart->hw_base); - // build UART Configuration parameter structure + MAP_UARTDisable(uart->hw_base); + // build UART Configuration parameter structure switch(cfg->data_bits) - { - case DATA_BITS_9: - // enable 9bit address mode and set DATA_BIT_8 - MAP_UART9BitEnable(uart->hw_base); - case DATA_BITS_8: - config |= UART_CONFIG_WLEN_8; - break; - case DATA_BITS_7: - config |= UART_CONFIG_WLEN_7; - break; - case DATA_BITS_6: - config |= UART_CONFIG_WLEN_6; - break; - case DATA_BITS_5: - config |= UART_CONFIG_WLEN_5; - break; - default: - RT_ASSERT(0); - break; - } - switch(cfg->parity) - { - case PARITY_ODD: - config |= UART_CONFIG_PAR_ODD; - break; - case PARITY_EVEN: - config |= UART_CONFIG_PAR_EVEN; - break; - case PARITY_NONE: - config |= UART_CONFIG_PAR_NONE; - break; - default: - RT_ASSERT(0); - break; - } - switch(cfg->stop_bits) - { - case STOP_BITS_1: - config |= UART_CONFIG_STOP_ONE; - break; - case STOP_BITS_2: - config |= UART_CONFIG_STOP_TWO; - break; - default: - RT_ASSERT(0); - break; - } - - // Initialize UART0 peripheral with given to corresponding parameter + { + case DATA_BITS_9: + // enable 9bit address mode and set DATA_BIT_8 + MAP_UART9BitEnable(uart->hw_base); + case DATA_BITS_8: + config |= UART_CONFIG_WLEN_8; + break; + case DATA_BITS_7: + config |= UART_CONFIG_WLEN_7; + break; + case DATA_BITS_6: + config |= UART_CONFIG_WLEN_6; + break; + case DATA_BITS_5: + config |= UART_CONFIG_WLEN_5; + break; + default: + RT_ASSERT(0); + break; + } + switch(cfg->parity) + { + case PARITY_ODD: + config |= UART_CONFIG_PAR_ODD; + break; + case PARITY_EVEN: + config |= UART_CONFIG_PAR_EVEN; + break; + case PARITY_NONE: + config |= UART_CONFIG_PAR_NONE; + break; + default: + RT_ASSERT(0); + break; + } + switch(cfg->stop_bits) + { + case STOP_BITS_1: + config |= UART_CONFIG_STOP_ONE; + break; + case STOP_BITS_2: + config |= UART_CONFIG_STOP_TWO; + break; + default: + RT_ASSERT(0); + break; + } + + // Initialize UART0 peripheral with given to corresponding parameter MAP_UARTConfigSetExpClk(uart->hw_base, SystemCoreClock, cfg->baud_rate, config); - MAP_UARTFIFOEnable(uart->hw_base); + MAP_UARTFIFOEnable(uart->hw_base); - // Enable the UART. - MAP_UARTEnable(uart->hw_base); + // Enable the UART. + MAP_UARTEnable(uart->hw_base); return RT_EOK; } static rt_err_t hw_control(struct rt_serial_device *serial, int cmd, void *arg) { - hw_uart_t* uart; + hw_uart_t* uart; RT_ASSERT(serial != RT_NULL); uart = mUartGetHwPtr(serial); @@ -123,21 +119,21 @@ static rt_err_t hw_control(struct rt_serial_device *serial, int cmd, void *arg) static int hw_putc(struct rt_serial_device *serial, char c) { - hw_uart_t* uart; + hw_uart_t* uart; RT_ASSERT(serial != RT_NULL); uart = mUartGetHwPtr(serial); - + MAP_UARTCharPut(uart->hw_base, *((uint8_t *)&c)); return 1; } static int hw_getc(struct rt_serial_device *serial) { - hw_uart_t* uart; + hw_uart_t* uart; RT_ASSERT(serial != RT_NULL); uart = mUartGetHwPtr(serial); - - return MAP_UARTCharGetNonBlocking(uart->hw_base); + + return MAP_UARTCharGetNonBlocking(uart->hw_base); } static const struct rt_uart_ops hw_uart_ops = @@ -158,7 +154,7 @@ hw_uart_t uart0 = void UART0_IRQHandler(void) { - uint32_t intsrc; + uint32_t intsrc; hw_uart_t *uart = &uart0; /* enter interrupt */ @@ -173,7 +169,7 @@ void UART0_IRQHandler(void) MAP_UARTIntClear(uart->hw_base, intsrc); rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND); } - + /* leave interrupt */ rt_interrupt_leave(); } @@ -191,7 +187,7 @@ int rt_hw_uart_init(void) config.stop_bits = STOP_BITS_1; config.invert = NRZ_NORMAL; config.bufsz = RT_SERIAL_RB_BUFSZ; - + #ifdef RT_USING_UART0 uart = &uart0; serial0.ops = &hw_uart_ops; @@ -200,7 +196,7 @@ int rt_hw_uart_init(void) MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); MAP_GPIOPinConfigure(GPIO_PA0_U0RX); MAP_GPIOPinConfigure(GPIO_PA1_U0TX); - + MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); @@ -208,15 +204,15 @@ int rt_hw_uart_init(void) //IntPrioritySet(INT_UART0, ((0x01 << 5) | 0x01)); /* Enable Interrupt for UART channel */ - UARTIntRegister(uart->hw_base, UART0_IRQHandler); - MAP_IntEnable(INT_UART0); - MAP_UARTEnable(uart->hw_base); + UARTIntRegister(uart->hw_base, UART0_IRQHandler); + MAP_IntEnable(INT_UART0); + MAP_UARTEnable(uart->hw_base); /* register UART0 device */ rt_hw_serial_register(&serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); #endif - return 0; + return 0; } INIT_BOARD_EXPORT(rt_hw_uart_init); diff --git a/bsp/tm4c129x/drivers/drv_uart.h b/bsp/tm4c129x/drivers/drv_uart.h index 312c6da6b32363c47236ccc540547ae8556e6c50..cd0bf1e0e384f66618a0c07e063789ddf5a787f3 100644 --- a/bsp/tm4c129x/drivers/drv_uart.h +++ b/bsp/tm4c129x/drivers/drv_uart.h @@ -1,11 +1,7 @@ /* - * File : drv_uart.h - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team + * Copyright (c) 2006-2021, RT-Thread Development Team * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE + * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes