diff --git a/bsp/lpc43xx/M0/rtthread_lpc43xx.sct b/bsp/lpc43xx/M0/rtthread_lpc43xx.sct new file mode 100644 index 0000000000000000000000000000000000000000..2232a4aa9b27a05b72b8902bc22dffce16a24146 --- /dev/null +++ b/bsp/lpc43xx/M0/rtthread_lpc43xx.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM2 0x1B000000 0x00080000 { ; load region size_region + ER_IROM2 0x1B000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM2 0x10080000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/lpc43xx/M0/template.uvproj b/bsp/lpc43xx/M0/template.uvproj index 95f6c36a2bfa1237d256facd624aa9ff691767b4..a95530737201e212631797bef7773d15888f7da6 100644 --- a/bsp/lpc43xx/M0/template.uvproj +++ b/bsp/lpc43xx/M0/template.uvproj @@ -73,10 +73,10 @@ 0 - 0 - 0 - - + 1 + 1 + fromelf --bin !L --output rtthread.bin + C:\Python27\python.exe ..\bin2C.py rtthread.bin ..\M4\applications\M0_CODE.h 0 0 @@ -208,10 +208,10 @@ 1 0 0 - 1 + 2 1 1 - 1 + 16 1 0 0 @@ -224,11 +224,11 @@ 0 0 0 - 1 + 0 0 0 0 - 0 + 1 0 0 0 @@ -338,7 +338,7 @@ 1 0 0 - 0 + 1 0 0 0 @@ -371,7 +371,7 @@ - 1 + 0 0 0 0 @@ -379,390 +379,8 @@ 0 0x14000000 0x10000000 - - - - - - - - - - - - LPC43xx RAM - 0x4 - ARM-ADS - - - LPC4357 - NXP (founded by Philips) - IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 - - "STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code") - UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000) - 6414 - LPC43xx.H - - - - - - - - - - SFD\NXP\LPC43xx\LPC43xx.SFR - 0 - - - - NXP\LPC43xx\ - NXP\LPC43xx\ - - 0 - 0 - 0 - 0 - 1 - - .\build\ - rtthread_lpc43xx - 1 - 0 - 0 - 1 - 1 - .\build\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 0 - 0 - 1 - 1 - 0 - 0 - 1 - 0 - - 0 - 1 - - - - - - - - - - - - - .\Dbg_RAM.ini - BIN\UL2CM3.DLL - - - - - 1 - 1 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2CM3.DLL - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 8 - 1 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 1 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x8000 - - - 1 - 0x1a000000 - 0x80000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x1a000000 - 0x80000 - - - 1 - 0x1b000000 - 0x80000 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x8000 - - - 0 - 0x20000000 - 0x10000 - - - - - - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - NO_CRP - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x10000000 - 0x20000000 - + + .\rtthread_lpc43xx.sct @@ -773,5 +391,4 @@ - diff --git a/bsp/lpc43xx/M4/rtthread_lpc43xx.sct b/bsp/lpc43xx/M4/rtthread_lpc43xx.sct new file mode 100644 index 0000000000000000000000000000000000000000..c483ea87d2d06e6bc99c1c06deb7383ba5ae3c2f --- /dev/null +++ b/bsp/lpc43xx/M4/rtthread_lpc43xx.sct @@ -0,0 +1,20 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x1A000000 0x00080000 { ; load region size_region + ER_IROM1 0x1A000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x10000000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } +} + +LR_IROM2 0x1B000000 0x00080000 { + ER_IROM2 0x1B000000 0x00080000 { ; load address = execution address + * (M0_CODE) + } +} diff --git a/bsp/lpc43xx/M4/template.uvproj b/bsp/lpc43xx/M4/template.uvproj index f93cbd2c11dd33e1d9208327226e9ac2827d3d66..f8bc0558a2b63c4915f8a1df25fe478b5f0c9761 100644 --- a/bsp/lpc43xx/M4/template.uvproj +++ b/bsp/lpc43xx/M4/template.uvproj @@ -211,7 +211,7 @@ 2 1 1 - 1 + 8 1 0 0 @@ -224,10 +224,10 @@ 0 0 0 - 1 + 0 0 0 - 0 + 1 0 0 0 @@ -338,7 +338,7 @@ 1 0 0 - 0 + 1 0 0 0 @@ -371,7 +371,7 @@ - 1 + 0 0 0 0 @@ -379,390 +379,8 @@ 0 0x14000000 0x10000000 - - - - - - - - - - - - LPC43xx RAM - 0x4 - ARM-ADS - - - LPC4357 - NXP (founded by Philips) - IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 - - "STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code") - UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000) - 6414 - LPC43xx.H - - - - - - - - - - SFD\NXP\LPC43xx\LPC43xx.SFR - 0 - - - - NXP\LPC43xx\ - NXP\LPC43xx\ - - 0 - 0 - 0 - 0 - 1 - - .\build\ - rtthread_lpc43xx - 1 - 0 - 0 - 1 - 1 - .\build\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - - - SARMCM3.DLL - -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 0 - 0 - 1 - 1 - 0 - 0 - 1 - 0 - - 0 - 1 - - - - - - - - - - - - - .\Dbg_RAM.ini - BIN\UL2CM3.DLL - - - - - 1 - 1 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2CM3.DLL - "" () - - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 1 - 1 - 8 - 1 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 1 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x8000 - - - 1 - 0x1a000000 - 0x80000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x1a000000 - 0x80000 - - - 1 - 0x1b000000 - 0x80000 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x10000000 - 0x8000 - - - 0 - 0x20000000 - 0x10000 - - - - - - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - NO_CRP - - - - - - 1 - 0 - 0 - 0 - 1 - 0 - 0x10000000 - 0x20000000 - + + .\rtthread_lpc43xx.sct @@ -773,5 +391,4 @@ - diff --git a/bsp/lpc43xx/bin2C.py b/bsp/lpc43xx/bin2C.py new file mode 100644 index 0000000000000000000000000000000000000000..bc76419b06d9152b50ef2628680f2f1bf43ae844 --- /dev/null +++ b/bsp/lpc43xx/bin2C.py @@ -0,0 +1,13 @@ +#!/bin/env python + +import sys + +fi = open(sys.argv[1], 'rb') +fo = open(sys.argv[2], 'wb') + +idx = 0 +for i in fi.read(): + idx += 1 + fo.write('0x%02x, ' % ord(i)) + if idx % 16 == 0: + fo.write('\n')