From c7c0edebba75ec67c70b9216432da9c137dc1f29 Mon Sep 17 00:00:00 2001 From: tanek liang Date: Tue, 29 Aug 2017 19:30:21 +0800 Subject: [PATCH] add spi flash driver --- bsp/gd32450z-eval/applications/application.c | 26 + bsp/gd32450z-eval/drivers/SConscript | 19 +- bsp/gd32450z-eval/drivers/drv_spi.c | 347 ++ bsp/gd32450z-eval/drivers/drv_spi.h | 42 + bsp/gd32450z-eval/drivers/drv_spi_flash.c | 105 + bsp/gd32450z-eval/project.ewp | 4948 +++++++++--------- bsp/gd32450z-eval/project.uvproj | 671 ++- bsp/gd32450z-eval/project.uvprojx | 465 +- bsp/gd32450z-eval/rtconfig.h | 61 +- bsp/gd32450z-eval/rtconfig.py | 22 +- bsp/gd32450z-eval/template.uvprojx | 2 +- 11 files changed, 4150 insertions(+), 2558 deletions(-) create mode 100644 bsp/gd32450z-eval/drivers/drv_spi.c create mode 100644 bsp/gd32450z-eval/drivers/drv_spi.h create mode 100644 bsp/gd32450z-eval/drivers/drv_spi_flash.c diff --git a/bsp/gd32450z-eval/applications/application.c b/bsp/gd32450z-eval/applications/application.c index 5284d36e8..533fcb474 100644 --- a/bsp/gd32450z-eval/applications/application.c +++ b/bsp/gd32450z-eval/applications/application.c @@ -22,6 +22,16 @@ #include #endif +#ifdef RT_USING_DFS +/* dfs init */ +#include +/* dfs filesystem:ELM filesystem init */ +#include +/* dfs Filesystem APIs */ +#include +#include +#endif + #include void gd_eval_led_init (void) @@ -56,6 +66,22 @@ void rt_init_thread_entry(void* parameter) } #endif +#ifdef RT_USING_DFS + #ifdef RT_USING_DFS_ELMFAT + /* mount sd card fat partition 0 as root directory */ + if (dfs_mount("gd25q16", "/", "elm", 0, 0) == 0) + { + rt_kprintf("spi flash mount to / !\n"); + } + else + { + rt_kprintf("spi flash mount to / failed!\n"); + } + #endif /* RT_USING_DFS_ELMFAT */ + +#endif /* DFS */ + + while(1) { GPIO_TG(GPIOD) = GPIO_PIN_4; diff --git a/bsp/gd32450z-eval/drivers/SConscript b/bsp/gd32450z-eval/drivers/SConscript index e928c6695..40107508d 100644 --- a/bsp/gd32450z-eval/drivers/SConscript +++ b/bsp/gd32450z-eval/drivers/SConscript @@ -9,14 +9,25 @@ src = Split(""" board.c drv_exmc_sdram.c drv_usart.c -gd32f450z_lcd_eval.c -drv_lcd.c -drv_enet.c -synopsys_emac.c """) CPPPATH = [cwd] +# add Ethernet drivers. +if GetDepend('RT_USING_LWIP'): + src += ['drv_enet.c', 'synopsys_emac.c'] + +# add lcd drivers. +if GetDepend('RT_USING_GUIENGINE'): + src += ['drv_lcd.c', 'gd32f450z_lcd_eval.c'] + +# add spi flash drivers. +if GetDepend('RT_USING_SFUD'): + src += ['drv_spi_flash.c', 'drv_spi.c'] +elif GetDepend('RT_USING_SPI'): + src += ['drv_spi.c'] + + group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/gd32450z-eval/drivers/drv_spi.c b/bsp/gd32450z-eval/drivers/drv_spi.c new file mode 100644 index 000000000..87ca4800b --- /dev/null +++ b/bsp/gd32450z-eval/drivers/drv_spi.c @@ -0,0 +1,347 @@ +/* + * File : drv_spi.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2017 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2017-06-05 tanek first implementation. + */ + +#include "drv_spi.h" + +#include +#include + +//#define DEBUG + +#define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0])) + +#ifdef DEBUG +#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__) +#else +#define DEBUG_PRINTF(...) +#endif + +/* private rt-thread spi ops function */ +static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration); +static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message); + +static struct rt_spi_ops stm32_spi_ops = +{ + configure, + xfer +}; + +static rt_err_t configure(struct rt_spi_device* device, + struct rt_spi_configuration* configuration) +{ + struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus; + struct stm32f4_spi *f4_spi = (struct stm32f4_spi *)spi_bus->parent.user_data; + + spi_parameter_struct spi_init_struct; + + uint32_t spi_periph = f4_spi->spi_periph; + + + RT_ASSERT(device != RT_NULL); + RT_ASSERT(configuration != RT_NULL); + + /* data_width */ + if(configuration->data_width <= 8) + { + spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT; + } + else if(configuration->data_width <= 16) + { + spi_init_struct.frame_size = SPI_FRAMESIZE_16BIT; + } + else + { + return RT_EIO; + } + + /* baudrate */ + { + rcu_clock_freq_enum spi_src; + uint32_t spi_apb_clock; + uint32_t max_hz; + + max_hz = configuration->max_hz; + + DEBUG_PRINTF("sys freq: %d\n", HAL_RCC_GetSysClockFreq()); + DEBUG_PRINTF("pclk2 freq: %d\n", HAL_RCC_GetPCLK2Freq()); + DEBUG_PRINTF("max freq: %d\n", max_hz); + + if (spi_periph == SPI1 || spi_periph == SPI2) + { + spi_src = CK_APB1; + } + else + { + spi_src = CK_APB2; + } + spi_apb_clock = rcu_clock_freq_get(spi_src); + + if(max_hz >= spi_apb_clock/2) + { + spi_init_struct.prescale = SPI_PSC_2; + } + else if (max_hz >= spi_apb_clock/4) + { + spi_init_struct.prescale = SPI_PSC_4; + } + else if (max_hz >= spi_apb_clock/8) + { + spi_init_struct.prescale = SPI_PSC_8; + } + else if (max_hz >= spi_apb_clock/16) + { + spi_init_struct.prescale = SPI_PSC_16; + } + else if (max_hz >= spi_apb_clock/32) + { + spi_init_struct.prescale = SPI_PSC_32; + } + else if (max_hz >= spi_apb_clock/64) + { + spi_init_struct.prescale = SPI_PSC_64; + } + else if (max_hz >= spi_apb_clock/128) + { + spi_init_struct.prescale = SPI_PSC_128; + } + else + { + /* min prescaler 256 */ + spi_init_struct.prescale = SPI_PSC_256; + } + } /* baudrate */ + + switch(configuration->mode) + { + case RT_SPI_MODE_0: + spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE; + break; + case RT_SPI_MODE_1: + spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_2EDGE; + break; + case RT_SPI_MODE_2: + spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_1EDGE; + break; + case RT_SPI_MODE_3: + spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE; + break; + } + + /* MSB or LSB */ + if(configuration->mode & RT_SPI_MSB) + { + spi_init_struct.endian = SPI_ENDIAN_MSB; + } + else + { + spi_init_struct.endian = SPI_ENDIAN_LSB; + } + + spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX; + spi_init_struct.device_mode = SPI_MASTER; + spi_init_struct.nss = SPI_NSS_SOFT; + + spi_crc_off(spi_periph); + + /* init SPI */ + spi_init(spi_periph, &spi_init_struct); + /* Enable SPI_MASTER */ + spi_enable(spi_periph); + + return RT_EOK; +}; + +static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message) +{ + struct rt_spi_bus * stm32_spi_bus = (struct rt_spi_bus *)device->bus; + struct stm32f4_spi *f4_spi = (struct stm32f4_spi *)stm32_spi_bus->parent.user_data; + struct rt_spi_configuration * config = &device->config; + struct stm32_spi_cs * stm32_spi_cs = device->parent.user_data; + uint32_t spi_periph = f4_spi->spi_periph; + + RT_ASSERT(device != NULL); + RT_ASSERT(message != NULL); + + /* take CS */ + if(message->cs_take) + { + gpio_bit_reset(stm32_spi_cs->GPIOx, stm32_spi_cs->GPIO_Pin); + DEBUG_PRINTF("spi take cs\n"); + } + + { + if(config->data_width <= 8) + { + const rt_uint8_t * send_ptr = message->send_buf; + rt_uint8_t * recv_ptr = message->recv_buf; + rt_uint32_t size = message->length; + + DEBUG_PRINTF("spi poll transfer start: %d\n", size); + + while(size--) + { + rt_uint8_t data = 0xFF; + + if(send_ptr != RT_NULL) + { + data = *send_ptr++; + } + + // Todo: replace register read/write by stm32f4 lib + //Wait until the transmit buffer is empty + while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE)); + // Send the byte + spi_i2s_data_transmit(spi_periph, data); + + //Wait until a data is received + while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE)); + // Get the received data + data = spi_i2s_data_receive(spi_periph); + + if(recv_ptr != RT_NULL) + { + *recv_ptr++ = data; + } + } + DEBUG_PRINTF("spi poll transfer finsh\n"); + } + else if(config->data_width <= 16) + { + const rt_uint16_t * send_ptr = message->send_buf; + rt_uint16_t * recv_ptr = message->recv_buf; + rt_uint32_t size = message->length; + + while(size--) + { + rt_uint16_t data = 0xFF; + + if(send_ptr != RT_NULL) + { + data = *send_ptr++; + } + + //Wait until the transmit buffer is empty + while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE)); + // Send the byte + spi_i2s_data_transmit(spi_periph, data); + + //Wait until a data is received + while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE)); + // Get the received data + data = spi_i2s_data_receive(spi_periph); + + if(recv_ptr != RT_NULL) + { + *recv_ptr++ = data; + } + } + } + } + + /* release CS */ + if(message->cs_release) + { + gpio_bit_set(stm32_spi_cs->GPIOx, stm32_spi_cs->GPIO_Pin); + DEBUG_PRINTF("spi release cs\n"); + } + + return message->length; +}; + + +static struct rt_spi_bus spi_bus[]; + +static const struct stm32f4_spi spis[] = { +#ifdef RT_USING_SPI0 + {SPI0, RCU_SPI0, &spi_bus[0]}, +#endif + +#ifdef RT_USING_SPI1 + {SPI1, RCU_SPI1, &spi_bus[1]}, +#endif + +#ifdef RT_USING_SPI2 + {SPI2, RCU_SPI2, &spi_bus[2]}, +#endif + +#ifdef RT_USING_SPI3 + {SPI3, RCU_SPI3, &spi_bus[3]}, +#endif + +#ifdef RT_USING_SPI4 + {SPI4, RCU_SPI4, &spi_bus[4]}, +#endif + +#ifdef RT_USING_SPI5 + {SPI5, RCU_SPI5, &spi_bus[5]}, +#endif +}; + +static struct rt_spi_bus spi_bus[ARR_LEN(spis)]; + +/** \brief init and register stm32 spi bus. + * + * \param SPI: STM32 SPI, e.g: SPI1,SPI2,SPI3. + * \param spi_bus_name: spi bus name, e.g: "spi1" + * \return + * + */ +rt_err_t stm32_spi_bus_register(uint32_t spi_periph, + //struct stm32_spi_bus * stm32_spi, + const char * spi_bus_name) +{ + int i; + + RT_ASSERT(spi_bus_name != RT_NULL); + + for (i = 0; i < ARR_LEN(spis); i++) + { + if (spi_periph == spis[i].spi_periph) + { + rcu_periph_clock_enable(spis[i].spi_clk); + spis[i].spi_bus->parent.user_data = (void *)&spis[i]; + rt_spi_bus_register(spis[i].spi_bus, spi_bus_name, &stm32_spi_ops); + return RT_EOK; + } + } + + return RT_ERROR; + +#ifdef SPI_USE_DMA + /* Configure the DMA handler for Transmission process */ + p_spi_bus->hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + p_spi_bus->hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE; + //p_spi_bus->hdma_tx.Init.MemInc = DMA_MINC_ENABLE; + p_spi_bus->hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + p_spi_bus->hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + p_spi_bus->hdma_tx.Init.Mode = DMA_NORMAL; + p_spi_bus->hdma_tx.Init.Priority = DMA_PRIORITY_LOW; + p_spi_bus->hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + p_spi_bus->hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + p_spi_bus->hdma_tx.Init.MemBurst = DMA_MBURST_INC4; + p_spi_bus->hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4; + + p_spi_bus->hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + p_spi_bus->hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE; + //p_spi_bus->hdma_rx.Init.MemInc = DMA_MINC_ENABLE; + p_spi_bus->hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + p_spi_bus->hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + p_spi_bus->hdma_rx.Init.Mode = DMA_NORMAL; + p_spi_bus->hdma_rx.Init.Priority = DMA_PRIORITY_HIGH; + p_spi_bus->hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + p_spi_bus->hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + p_spi_bus->hdma_rx.Init.MemBurst = DMA_MBURST_INC4; + p_spi_bus->hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4; +#endif +} diff --git a/bsp/gd32450z-eval/drivers/drv_spi.h b/bsp/gd32450z-eval/drivers/drv_spi.h new file mode 100644 index 000000000..4f76f7eae --- /dev/null +++ b/bsp/gd32450z-eval/drivers/drv_spi.h @@ -0,0 +1,42 @@ +/* + * File : stm32f20x_40x_spi.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 20012-01-01 aozima first implementation. + */ + +#ifndef STM32F20X_40X_SPI_H_INCLUDED +#define STM32F20X_40X_SPI_H_INCLUDED + +#include +#include + +#include "gd32f4xx.h" + +struct stm32f4_spi +{ + uint32_t spi_periph; + rcu_periph_enum spi_clk; + struct rt_spi_bus *spi_bus; +}; + + +struct stm32_spi_cs +{ + uint32_t GPIOx; + uint32_t GPIO_Pin; +}; + +/* public function */ +rt_err_t stm32_spi_bus_register(uint32_t spi_periph, + //struct stm32_spi_bus * stm32_spi, + const char * spi_bus_name); + +#endif // STM32F20X_40X_SPI_H_INCLUDED diff --git a/bsp/gd32450z-eval/drivers/drv_spi_flash.c b/bsp/gd32450z-eval/drivers/drv_spi_flash.c new file mode 100644 index 000000000..8ad36ab0b --- /dev/null +++ b/bsp/gd32450z-eval/drivers/drv_spi_flash.c @@ -0,0 +1,105 @@ +/* + * File : stm32f20x_40x_spi.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2012-01-01 aozima first implementation. + * 2012-07-27 aozima fixed variable uninitialized. + */ +#include +#include "drv_spi.h" +#include "spi_flash.h" + +#ifdef RT_USING_SFUD +#include "spi_flash_sfud.h" +#endif + +#ifdef RT_USING_W25QXX +#include "spi_flash_w25qxx.h" +#endif + +#include +#include + +#if defined(RT_USING_SFUD) && defined(RT_USING_W25QXX) +#error "RT_USING_SFUD and RT_USING_W25QXX only need one" +#endif + +#define SPI_PERIPH SPI5 +#define SPI_BUS_NAME "spi5" +#define SPI_FLASH_DEVICE_NAME "spi50" +#define SPI_FLASH_CHIP "gd25q16" + +static int rt_hw_spi5_init(void) +{ + /* register spi bus */ + { + rt_err_t result; + + rcu_periph_clock_enable(RCU_GPIOG); + rcu_periph_clock_enable(RCU_SPI5); + + /* SPI5_CLK(PG13), SPI5_MISO(PG12), SPI5_MOSI(PG14),SPI5_IO2(PG10) and SPI5_IO3(PG11) GPIO pin configuration */ + gpio_af_set(GPIOG, GPIO_AF_5, GPIO_PIN_10|GPIO_PIN_11| GPIO_PIN_12|GPIO_PIN_13| GPIO_PIN_14); + gpio_mode_set(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_10|GPIO_PIN_11| GPIO_PIN_12|GPIO_PIN_13| GPIO_PIN_14); + gpio_output_options_set(GPIOG, GPIO_OTYPE_PP, GPIO_OSPEED_200MHZ, GPIO_PIN_10|GPIO_PIN_11| GPIO_PIN_12|GPIO_PIN_13| GPIO_PIN_14); + + result = stm32_spi_bus_register(SPI5, SPI_BUS_NAME); + if (result != RT_EOK) + { + return result; + } + } + + /* attach cs */ + { + static struct rt_spi_device spi_device; + static struct stm32_spi_cs spi_cs; + rt_err_t result; + + spi_cs.GPIOx = GPIOG; + spi_cs.GPIO_Pin = GPIO_PIN_9; + + /* SPI5_CS(PG9) GPIO pin configuration */ + gpio_mode_set(GPIOG, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_9); + gpio_output_options_set(GPIOG, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9); + + gpio_bit_set(GPIOG,GPIO_PIN_9); + + result = rt_spi_bus_attach_device(&spi_device, SPI_FLASH_DEVICE_NAME, SPI_BUS_NAME, (void*)&spi_cs); + if (result != RT_EOK) + { + return result; + } + } + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_spi5_init); + +#ifdef RT_USING_SFUD +static int rt_hw_spi_flash_with_sfud_init(void) +{ + if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME)) + { + return RT_ERROR; + }; + + return RT_EOK; +} +INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init) +#endif + +#ifdef RT_USING_W25QXX +static int rt_hw_spi_flash_init(void) +{ + return w25qxx_init(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME); +} +INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init) +#endif diff --git a/bsp/gd32450z-eval/project.ewp b/bsp/gd32450z-eval/project.ewp index 976edac9f..5154f827d 100644 --- a/bsp/gd32450z-eval/project.ewp +++ b/bsp/gd32450z-eval/project.ewp @@ -1,2345 +1,2603 @@ - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 22 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 22 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - Applications - - $PROJ_DIR$\applications\application.c - - - $PROJ_DIR$\applications\benchmark.c - - - $PROJ_DIR$\applications\device_test.c - - - $PROJ_DIR$\applications\mem_test.c - - - $PROJ_DIR$\applications\ping.c - - - $PROJ_DIR$\applications\rtgui_demo.c - - - $PROJ_DIR$\applications\startup.c - - - - Drivers - - $PROJ_DIR$\drivers\board.c - - - $PROJ_DIR$\drivers\drv_exmc_sdram.c - - - $PROJ_DIR$\drivers\drv_usart.c - - - $PROJ_DIR$\drivers\gd32f450z_lcd_eval.c - - - $PROJ_DIR$\drivers\drv_lcd.c - - - $PROJ_DIR$\drivers\drv_enet.c - - - $PROJ_DIR$\drivers\synopsys_emac.c - - - - GD32_Lib - - $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c - - - $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c - - - 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$PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c + + + $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c + + + $PROJ_DIR$\Libraries\CMSIS\GD\GD32F4xx\Source\IAR\startup_gd32f4xx.s + + + $PROJ_DIR$\Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c + + + + Kernel + + $PROJ_DIR$\..\..\..\git\rt-thread\src\clock.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\components.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\device.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\idle.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\ipc.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\irq.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\kservice.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\mem.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\memheap.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\mempool.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\module.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\object.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\scheduler.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\thread.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\src\timer.c + + + + LwIP + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_lib.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_msg.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\autoip.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\def.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dhcp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dns.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\err.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\etharp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\ethernetif.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\icmp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\igmp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet_chksum.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\init.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_addr.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_frag.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\memp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netbuf.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netdb.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\netif.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netifapi.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\pbuf.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\raw.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\slipif.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\sockets.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\stats.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\sys.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\sys_arch.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_in.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_out.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\tcpip.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\timers.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\udp.c + + + + trace + + $PROJ_DIR$\..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_SYSVIEW.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c + + + $PROJ_DIR$\..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c + + + diff --git a/bsp/gd32450z-eval/project.uvproj b/bsp/gd32450z-eval/project.uvproj index 6d6f87d5e..7dbf1cbb9 100644 --- a/bsp/gd32450z-eval/project.uvproj +++ b/bsp/gd32450z-eval/project.uvproj @@ -1,10 +1,7 @@ - 1.1 -
### uVision Project, (C) Keil Software
- rt-thread_gd32f4xx @@ -15,26 +12,26 @@ GD32F450ZK GigaDevice IRAM(0x20000000-0x2002FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x08000000-0x082FFFFF) CLOCK(16000000) CPUTYPE("Cortex-M4") FPU2 - + "Startup\GD\GD32F4xx\startup_gd32f4xx.s" ("GD32F4xx Startup Code") UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000) 0 gd32f4xx0.h - - - - - - - - - + + + + + + + + + SFD\GD\GD32F4xx\GD32F4xx.SFR 0 0 - - - + + + GD\GD32F4xx\ GD\GD32F4xx\ @@ -58,8 +55,8 @@ 0 0 - - + + 0 0 0 @@ -68,21 +65,21 @@ 0 0 - - + + 0 0 0 0 - - + + 0 0 0 - + 0 @@ -96,8 +93,8 @@ 0 0 3 - - + + 1 @@ -106,7 +103,7 @@ DCM.DLL -pCM3 SARMCM3.DLL - + TCM.DLL -pCM3 @@ -144,21 +141,21 @@ 0 0 - 6 + 12 - - - - - + + + + + - - - - - - Segger\JL2CM3.dll + + + + + + BIN\CMSIS_AGDI.dll @@ -173,10 +170,10 @@ 1 BIN\UL2CM3.DLL "" () - - - - + + + + 0 @@ -209,7 +206,7 @@ 0 0 "Cortex-M4" - + 0 0 0 @@ -340,7 +337,7 @@ 0x10000 - + 1 @@ -359,10 +356,10 @@ 0 0 - + GD32F4XX, USE_STDPERIPH_DRIVER - - applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh + + applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi\sfud\inc;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\ipv4;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\netif;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER @@ -376,10 +373,10 @@ 0 0 - - - - + + + + @@ -391,13 +388,13 @@ 0 0x08000000 0x20000000 - - - - + + + + --keep *.o(RTMSymTab) --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) - - + + @@ -410,6 +407,43 @@ 1 applications\application.c + + + + benchmark.c + 1 + applications\benchmark.c + + + + + device_test.c + 1 + applications\device_test.c + + + + + mem_test.c + 1 + applications\mem_test.c + + + + + ping.c + 1 + applications\ping.c + + + + + rtgui_demo.c + 1 + applications\rtgui_demo.c + + + startup.c 1 @@ -425,53 +459,47 @@ 1 drivers\board.c + + + + drv_exmc_sdram.c + 1 + drivers\drv_exmc_sdram.c + + + drv_usart.c 1 drivers\drv_usart.c - - - 2 - 0 - 0 - 0 - 0 - 0 - 2 - 2 - 2 - 2 - 11 - - - 1 - - - - 2 - 0 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 0 - 2 - 2 - 2 - 2 - - - - - - - - - + + + + + drv_enet.c + 1 + drivers\drv_enet.c + + + + + synopsys_emac.c + 1 + drivers\synopsys_emac.c + + + + + drv_spi_flash.c + 1 + drivers\drv_spi_flash.c + + + + + drv_spi.c + 1 + drivers\drv_spi.c @@ -483,151 +511,211 @@ 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c + + gd32f4xx_can.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c + + gd32f4xx_crc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c + + gd32f4xx_ctc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c + + gd32f4xx_dac.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c + + gd32f4xx_dbg.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c + + gd32f4xx_dci.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c + + gd32f4xx_dma.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c + + gd32f4xx_enet.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c + + gd32f4xx_exmc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c + + gd32f4xx_exti.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c + + gd32f4xx_fmc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c + + gd32f4xx_fwdgt.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c + + gd32f4xx_gpio.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c + + gd32f4xx_i2c.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c + + gd32f4xx_ipa.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c + + gd32f4xx_iref.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c + + gd32f4xx_misc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c + + gd32f4xx_pmu.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c + + gd32f4xx_rcu.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c + + gd32f4xx_rtc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c + + gd32f4xx_sdio.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c + + gd32f4xx_spi.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c + + gd32f4xx_syscfg.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c + + gd32f4xx_timer.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c + + gd32f4xx_tli.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c + + gd32f4xx_trng.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c + + gd32f4xx_usart.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c + + gd32f4xx_wwdgt.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c + + system_gd32f4xx.c 1 Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c + + startup_gd32f4xx.s 2 @@ -643,71 +731,99 @@ 1 ..\..\..\git\rt-thread\src\clock.c + + components.c 1 ..\..\..\git\rt-thread\src\components.c + + device.c 1 ..\..\..\git\rt-thread\src\device.c + + idle.c 1 ..\..\..\git\rt-thread\src\idle.c + + ipc.c 1 ..\..\..\git\rt-thread\src\ipc.c + + irq.c 1 ..\..\..\git\rt-thread\src\irq.c + + kservice.c 1 ..\..\..\git\rt-thread\src\kservice.c + + mem.c 1 ..\..\..\git\rt-thread\src\mem.c + + memheap.c 1 ..\..\..\git\rt-thread\src\memheap.c + + mempool.c 1 ..\..\..\git\rt-thread\src\mempool.c + + module.c 1 ..\..\..\git\rt-thread\src\module.c + + object.c 1 ..\..\..\git\rt-thread\src\object.c + + scheduler.c 1 ..\..\..\git\rt-thread\src\scheduler.c + + thread.c 1 ..\..\..\git\rt-thread\src\thread.c + + timer.c 1 @@ -723,21 +839,29 @@ 1 ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\cpuport.c + + context_rvds.S 2 ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\context_rvds.S + + backtrace.c 1 ..\..\..\git\rt-thread\libcpu\arm\common\backtrace.c + + div0.c 1 ..\..\..\git\rt-thread\libcpu\arm\common\div0.c + + showmem.c 1 @@ -753,56 +877,99 @@ 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c_core.c + + i2c_dev.c 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c_dev.c + + i2c-bit-ops.c 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c-bit-ops.c + + serial.c 1 ..\..\..\git\rt-thread\components\drivers\serial\serial.c + + spi_core.c 1 ..\..\..\git\rt-thread\components\drivers\spi\spi_core.c + + spi_dev.c 1 ..\..\..\git\rt-thread\components\drivers\spi\spi_dev.c + + + + spi_flash_sfud.c + 1 + ..\..\..\git\rt-thread\components\drivers\spi\spi_flash_sfud.c + + + + + sfud.c + 1 + ..\..\..\git\rt-thread\components\drivers\spi\sfud\src\sfud.c + + + + + sfud_sfdp.c + 1 + ..\..\..\git\rt-thread\components\drivers\spi\sfud\src\sfud_sfdp.c + + + completion.c 1 ..\..\..\git\rt-thread\components\drivers\src\completion.c + + dataqueue.c 1 ..\..\..\git\rt-thread\components\drivers\src\dataqueue.c + + pipe.c 1 ..\..\..\git\rt-thread\components\drivers\src\pipe.c + + portal.c 1 ..\..\..\git\rt-thread\components\drivers\src\portal.c + + ringbuffer.c 1 ..\..\..\git\rt-thread\components\drivers\src\ringbuffer.c + + workqueue.c 1 @@ -818,61 +985,85 @@ 1 ..\..\..\git\rt-thread\components\finsh\shell.c + + symbol.c 1 ..\..\..\git\rt-thread\components\finsh\symbol.c + + cmd.c 1 ..\..\..\git\rt-thread\components\finsh\cmd.c + + finsh_compiler.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_compiler.c + + finsh_error.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_error.c + + finsh_heap.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_heap.c + + finsh_init.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_init.c + + finsh_node.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_node.c + + finsh_ops.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_ops.c + + finsh_parser.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_parser.c + + finsh_var.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_var.c + + finsh_vm.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_vm.c + + finsh_token.c 1 @@ -880,8 +1071,286 @@ + + LwIP + + + api_lib.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_lib.c + + + + + api_msg.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_msg.c + + + + + err.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\err.c + + + + + netbuf.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netbuf.c + + + + + netdb.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netdb.c + + + + + netifapi.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netifapi.c + + + + + sockets.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\sockets.c + + + + + tcpip.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\tcpip.c + + + + + sys_arch.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\sys_arch.c + + + + + def.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\def.c + + + + + dhcp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dhcp.c + + + + + dns.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dns.c + + + + + init.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\init.c + + + + + memp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\memp.c + + + + + netif.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\netif.c + + + + + pbuf.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\pbuf.c + + + + + raw.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\raw.c + + + + + stats.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\stats.c + + + + + sys.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\sys.c + + + + + tcp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp.c + + + + + tcp_in.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_in.c + + + + + tcp_out.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_out.c + + + + + timers.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\timers.c + + + + + udp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\udp.c + + + + + autoip.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\autoip.c + + + + + icmp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\icmp.c + + + + + igmp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\igmp.c + + + + + inet.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet.c + + + + + inet_chksum.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet_chksum.c + + + + + ip.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip.c + + + + + ip_addr.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_addr.c + + + + + ip_frag.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_frag.c + + + + + etharp.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\etharp.c + + + + + ethernetif.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\ethernetif.c + + + + + slipif.c + 1 + ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\slipif.c + + + + + trace + + + SEGGER_SYSVIEW_Config_RTThread.c + 1 + ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c + + + + + SEGGER_SYSVIEW_RTThread.c + 1 + ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c + + + + + SEGGER_RTT.c + 1 + ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c + + + + + SEGGER_SYSVIEW.c + 1 + ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_SYSVIEW.c + + + - diff --git a/bsp/gd32450z-eval/project.uvprojx b/bsp/gd32450z-eval/project.uvprojx index 84eced5fb..83b3daf82 100644 --- a/bsp/gd32450z-eval/project.uvprojx +++ b/bsp/gd32450z-eval/project.uvprojx @@ -1,16 +1,12 @@ - 2.1 -
### uVision Project, (C) Keil Software
- rt-thread_gd32f4xx 0x4 ARM-ADS - 5060422::V5.06 update 4 (build 422)::ARMCC GD32F450ZK @@ -18,28 +14,28 @@ GigaDevice.GD32F4xx_DFP.1.0.1 http://gd32mcu.21ic.com/data/documents/yingyongruanjian/GD32F4 IRAM(0x20000000,0x030000) IRAM2(0x10000000,0x010000) IROM(0x08000000,0x0300000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE - - + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)) 0 $$Device:GD32F450ZK$Device\Include\gd32f4xx.h - - - - - - - - - + + + + + + + + + $$Device:GD32F450ZK$SVD\GD32F4xx.svd 0 0 - - - - - + + + + + 0 0 @@ -61,8 +57,8 @@ 0 0 - - + + 0 0 0 @@ -71,8 +67,8 @@ 0 0 - - + + 0 0 0 @@ -82,14 +78,14 @@ 1 0 fromelf --bin !L --output rtthread.bin - + 0 0 0 0 0 - + 0 @@ -103,8 +99,8 @@ 0 0 3 - - + + 1 @@ -137,11 +133,11 @@ 1 BIN\UL2CM3.DLL - - - - - + + + + + 0 @@ -174,7 +170,7 @@ 0 0 "Cortex-M4" - + 0 0 0 @@ -306,7 +302,7 @@ 0x10000 - + 1 @@ -332,10 +328,10 @@ 0 0 - - GD32F4XX, USE_STDPERIPH_DRIVER - - applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\ipv4;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\netif;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER + + GD32F4XX, RT_USING_ARM_LIBC, USE_STDPERIPH_DRIVER + + applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\dfs\include;..\..\..\git\rt-thread\components\dfs\filesystems\devfs;..\..\..\git\rt-thread\components\dfs\filesystems\elmfat;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi\sfud\inc;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh;..\..\..\git\rt-thread\components\libc\armlibc;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\ipv4;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\include;..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\include\netif;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config;..\..\..\git\rt-thread\components\trace;..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER @@ -350,10 +346,10 @@ 0 0 - - - - + + + + @@ -365,13 +361,13 @@ 0 0x08000000 0x20000000 - + .\gd32_rom.ld - - + + --keep *.o(RTMSymTab) --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) - - + + @@ -384,31 +380,43 @@ 1 applications\application.c + + benchmark.c 1 applications\benchmark.c + + device_test.c 1 applications\device_test.c + + mem_test.c 1 applications\mem_test.c + + ping.c 1 applications\ping.c + + rtgui_demo.c 1 applications\rtgui_demo.c + + startup.c 1 @@ -424,35 +432,47 @@ 1 drivers\board.c + + drv_exmc_sdram.c 1 drivers\drv_exmc_sdram.c + + drv_usart.c 1 drivers\drv_usart.c + + - gd32f450z_lcd_eval.c + drv_enet.c 1 - drivers\gd32f450z_lcd_eval.c + drivers\drv_enet.c + + - drv_lcd.c + synopsys_emac.c 1 - drivers\drv_lcd.c + drivers\synopsys_emac.c + + - drv_enet.c + drv_spi_flash.c 1 - drivers\drv_enet.c + drivers\drv_spi_flash.c + + - synopsys_emac.c + drv_spi.c 1 - drivers\synopsys_emac.c + drivers\drv_spi.c @@ -464,151 +484,211 @@ 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c + + gd32f4xx_can.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c + + gd32f4xx_crc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c + + gd32f4xx_ctc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c + + gd32f4xx_dac.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c + + gd32f4xx_dbg.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c + + gd32f4xx_dci.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c + + gd32f4xx_dma.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c + + gd32f4xx_enet.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c + + gd32f4xx_exmc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c + + gd32f4xx_exti.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c + + gd32f4xx_fmc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c + + gd32f4xx_fwdgt.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c + + gd32f4xx_gpio.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c + + gd32f4xx_i2c.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c + + gd32f4xx_ipa.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c + + gd32f4xx_iref.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c + + gd32f4xx_misc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c + + gd32f4xx_pmu.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c + + gd32f4xx_rcu.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c + + gd32f4xx_rtc.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c + + gd32f4xx_sdio.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c + + gd32f4xx_spi.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c + + gd32f4xx_syscfg.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c + + gd32f4xx_timer.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c + + gd32f4xx_tli.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c + + gd32f4xx_trng.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c + + gd32f4xx_usart.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c + + gd32f4xx_wwdgt.c 1 Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c + + system_gd32f4xx.c 1 Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c + + startup_gd32f4xx.s 2 @@ -624,71 +704,99 @@ 1 ..\..\..\git\rt-thread\src\clock.c + + components.c 1 ..\..\..\git\rt-thread\src\components.c + + device.c 1 ..\..\..\git\rt-thread\src\device.c + + idle.c 1 ..\..\..\git\rt-thread\src\idle.c + + ipc.c 1 ..\..\..\git\rt-thread\src\ipc.c + + irq.c 1 ..\..\..\git\rt-thread\src\irq.c + + kservice.c 1 ..\..\..\git\rt-thread\src\kservice.c + + mem.c 1 ..\..\..\git\rt-thread\src\mem.c + + memheap.c 1 ..\..\..\git\rt-thread\src\memheap.c + + mempool.c 1 ..\..\..\git\rt-thread\src\mempool.c + + module.c 1 ..\..\..\git\rt-thread\src\module.c + + object.c 1 ..\..\..\git\rt-thread\src\object.c + + scheduler.c 1 ..\..\..\git\rt-thread\src\scheduler.c + + thread.c 1 ..\..\..\git\rt-thread\src\thread.c + + timer.c 1 @@ -704,21 +812,29 @@ 1 ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\cpuport.c + + context_rvds.S 2 ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\context_rvds.S + + backtrace.c 1 ..\..\..\git\rt-thread\libcpu\arm\common\backtrace.c + + div0.c 1 ..\..\..\git\rt-thread\libcpu\arm\common\div0.c + + showmem.c 1 @@ -726,6 +842,65 @@ + + Filesystem + + + dfs.c + 1 + ..\..\..\git\rt-thread\components\dfs\src\dfs.c + + + + + dfs_file.c + 1 + ..\..\..\git\rt-thread\components\dfs\src\dfs_file.c + + + + + dfs_fs.c + 1 + ..\..\..\git\rt-thread\components\dfs\src\dfs_fs.c + + + + + dfs_posix.c + 1 + ..\..\..\git\rt-thread\components\dfs\src\dfs_posix.c + + + + + console.c + 1 + ..\..\..\git\rt-thread\components\dfs\filesystems\devfs\console.c + + + + + devfs.c + 1 + ..\..\..\git\rt-thread\components\dfs\filesystems\devfs\devfs.c + + + + + dfs_elm.c + 1 + ..\..\..\git\rt-thread\components\dfs\filesystems\elmfat\dfs_elm.c + + + + + ff.c + 1 + ..\..\..\git\rt-thread\components\dfs\filesystems\elmfat\ff.c + + + DeviceDrivers @@ -734,56 +909,99 @@ 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c_core.c + + i2c_dev.c 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c_dev.c + + i2c-bit-ops.c 1 ..\..\..\git\rt-thread\components\drivers\i2c\i2c-bit-ops.c + + + + rtc.c + 1 + ..\..\..\git\rt-thread\components\drivers\rtc\rtc.c + + + serial.c 1 ..\..\..\git\rt-thread\components\drivers\serial\serial.c + + spi_core.c 1 ..\..\..\git\rt-thread\components\drivers\spi\spi_core.c + + spi_dev.c 1 ..\..\..\git\rt-thread\components\drivers\spi\spi_dev.c + + + + spi_flash_sfud.c + 1 + ..\..\..\git\rt-thread\components\drivers\spi\spi_flash_sfud.c + + + + + sfud.c + 1 + ..\..\..\git\rt-thread\components\drivers\spi\sfud\src\sfud.c + + + completion.c 1 ..\..\..\git\rt-thread\components\drivers\src\completion.c + + dataqueue.c 1 ..\..\..\git\rt-thread\components\drivers\src\dataqueue.c + + pipe.c 1 ..\..\..\git\rt-thread\components\drivers\src\pipe.c + + portal.c 1 ..\..\..\git\rt-thread\components\drivers\src\portal.c + + ringbuffer.c 1 ..\..\..\git\rt-thread\components\drivers\src\ringbuffer.c + + workqueue.c 1 @@ -799,61 +1017,85 @@ 1 ..\..\..\git\rt-thread\components\finsh\shell.c + + symbol.c 1 ..\..\..\git\rt-thread\components\finsh\symbol.c + + cmd.c 1 ..\..\..\git\rt-thread\components\finsh\cmd.c + + finsh_compiler.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_compiler.c + + finsh_error.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_error.c + + finsh_heap.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_heap.c + + finsh_init.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_init.c + + finsh_node.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_node.c + + finsh_ops.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_ops.c + + finsh_parser.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_parser.c + + finsh_var.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_var.c + + finsh_vm.c 1 ..\..\..\git\rt-thread\components\finsh\finsh_vm.c + + finsh_token.c 1 @@ -861,6 +1103,30 @@ + + libc + + + libc_syms.c + 1 + ..\..\..\git\rt-thread\components\libc\armlibc\libc_syms.c + + + + + mem_std.c + 1 + ..\..\..\git\rt-thread\components\libc\armlibc\mem_std.c + + + + + stubs.c + 1 + ..\..\..\git\rt-thread\components\libc\armlibc\stubs.c + + + LwIP @@ -869,171 +1135,239 @@ 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_lib.c + + api_msg.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\api_msg.c + + err.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\err.c + + netbuf.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netbuf.c + + netdb.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netdb.c + + netifapi.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\netifapi.c + + sockets.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\sockets.c + + tcpip.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\api\tcpip.c + + sys_arch.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\arch\sys_arch.c + + def.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\def.c + + dhcp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dhcp.c + + dns.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\dns.c + + init.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\init.c + + memp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\memp.c + + netif.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\netif.c + + pbuf.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\pbuf.c + + raw.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\raw.c + + stats.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\stats.c + + sys.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\sys.c + + tcp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp.c + + tcp_in.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_in.c + + tcp_out.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\tcp_out.c + + timers.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\timers.c + + udp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\udp.c + + autoip.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\autoip.c + + icmp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\icmp.c + + igmp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\igmp.c + + inet.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet.c + + inet_chksum.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\inet_chksum.c + + ip.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip.c + + ip_addr.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_addr.c + + ip_frag.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\core\ipv4\ip_frag.c + + etharp.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\etharp.c + + ethernetif.c 1 ..\..\..\git\rt-thread\components\net\lwip-1.4.1\src\netif\ethernetif.c + + slipif.c 1 @@ -1049,16 +1383,22 @@ 1 ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_Config_RTThread.c + + SEGGER_SYSVIEW_RTThread.c 1 ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\Config\SEGGER_SYSVIEW_RTThread.c + + SEGGER_RTT.c 1 ..\..\..\git\rt-thread\components\trace\SystemView_Src_V240\SEGGER\SEGGER_RTT.c + + SEGGER_SYSVIEW.c 1 @@ -1066,24 +1406,19 @@ - - ::CMSIS - - - + - + - + - + - diff --git a/bsp/gd32450z-eval/rtconfig.h b/bsp/gd32450z-eval/rtconfig.h index fe664bdc1..1e5b64e20 100644 --- a/bsp/gd32450z-eval/rtconfig.h +++ b/bsp/gd32450z-eval/rtconfig.h @@ -120,45 +120,40 @@ #define FINSH_USING_DESCRIPTION //#define FINSH_USING_MSH +#define RT_USING_RTC +#ifdef RT_USING_RTC +#define RT_RTC_NAME "rtc" +#endif + +//
+// +#define RT_USING_LIBC + /* SECTION: device filesystem */ /* Using Device file system */ -//#define RT_USING_DFS /**/ +#define RT_USING_DFS /**/ // #define RT_USING_DFS_DEVFS -// -#define DFS_FILESYSTEM_TYPES_MAX 4 +//// +//#define DFS_FILESYSTEM_TYPES_MAX 2 /* the max number of mounted filesystem */ -#define DFS_FILESYSTEMS_MAX 4 +#define DFS_FILESYSTEMS_MAX 2 /* the max number of opened files */ -#define DFS_FD_MAX 16 +#define DFS_FD_MAX 4 //#define DFS_USING_WORKDIR /* Using ELM FATFS */ #define RT_USING_DFS_ELMFAT -#define RT_DFS_ELM_WORD_ACCESS -/* Reentrancy (thread safe) of the FatFs module. */ -#define RT_DFS_ELM_REENTRANT -/* Number of volumes (logical drives) to be used. */ +////#define RT_DFS_ELM_WORD_ACCESS +///* Reentrancy (thread safe) of the FatFs module. */ +//#define RT_DFS_ELM_REENTRANT +///* Number of volumes (logical drives) to be used. */ #define RT_DFS_ELM_DRIVES 2 -#define RT_DFS_ELM_USE_LFN 3 /* */ -#define RT_DFS_ELM_CODE_PAGE 437 +//#define RT_DFS_ELM_USE_LFN 3 /* */ #define RT_DFS_ELM_MAX_LFN 255 -/* Maximum sector size to be handled. */ +///* Maximum sector size to be handled. */ #define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 - -/* DFS: UFFS nand file system options */ -#define RT_USING_DFS_UFFS -/* configuration for uffs, more to see dfs_uffs.h and uffs_config.h */ -#define RT_CONFIG_UFFS_ECC_MODE UFFS_ECC_HW_AUTO - //UFFS_ECC_SOFT - //UFFS_ECC_HW_AUTO - -/* enable this ,you need provide a mark_badblock/check_block function */ -/* #define RT_UFFS_USE_CHECK_MARK_FUNCITON */ -/* Using ROM file system */ -// #define RT_USING_DFS_ROMFS - /* SECTION: lwip, a lighwight TCP/IP protocol stack */ #define RT_USING_LWIP /* LwIP uses RT-Thread Memory Management */ @@ -225,14 +220,18 @@ /* spi driver */ #define RT_USING_SPI +#define RT_USING_SPI0 +#define RT_USING_SPI1 +#define RT_USING_SPI2 +#define RT_USING_SPI3 +#define RT_USING_SPI4 #define RT_USING_SPI5 +//#define RT_USING_W25QXX +//#define FLASH_DEBUG -/* Serial Flash Universal Driver */ -//#define RT_USING_SFUD -/* Enable SFUD debug output */ -//#define RT_DEBUG_SFUD 1 -/* serial flash discoverable parameters by JEDEC standard */ -#define RT_SFUD_USING_SFDP +#define RT_USING_SFUD +//#define RT_SFUD_USING_SFDP +#define RT_SFUD_USING_FLASH_INFO_TABLE #define RT_USING_I2C #define RT_USING_I2C_BITOPS diff --git a/bsp/gd32450z-eval/rtconfig.py b/bsp/gd32450z-eval/rtconfig.py index 185e89bf4..3d9ffaab8 100644 --- a/bsp/gd32450z-eval/rtconfig.py +++ b/bsp/gd32450z-eval/rtconfig.py @@ -3,7 +3,7 @@ import os # toolchains options ARCH='arm' CPU='cortex-m4' -CROSS_TOOL='keil' +CROSS_TOOL='iar' if os.getenv('RTT_CC'): CROSS_TOOL = os.getenv('RTT_CC') @@ -20,11 +20,9 @@ elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = r'C:/Keil_v5' elif CROSS_TOOL == 'iar': - print '================ERROR============================' - print 'Not support iar yet!' - print '=================================================' - exit(0) - + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') @@ -44,12 +42,14 @@ elif PLATFORM == 'armcc': DEVICE = ' --cpu=cortex-m4.fp' CFLAGS = DEVICE + ' --apcs=interwork --cpu Cortex-M4.fp' AFLAGS = DEVICE - LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-gd32.map --scatter stm32_rom.sct' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-gd32.map --scatter gd32_rom.sct' CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' EXEC_PATH += '/arm/bin40/' + + CFLAGS += ' --c99' if BUILD == 'debug': CFLAGS += ' -g -O0' @@ -67,7 +67,7 @@ elif PLATFORM == 'iar': LINK = 'ilinkarm' TARGET_EXT = 'out' - DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D STM32F10X_HD' + DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D GD32F450xK' CFLAGS = DEVICE CFLAGS += ' --diag_suppress Pa050' @@ -83,7 +83,7 @@ elif PLATFORM == 'iar': CFLAGS += ' --cpu=Cortex-M4' CFLAGS += ' -e' CFLAGS += ' --fpu=None' - CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' CFLAGS += ' -Ol' CFLAGS += ' --use_c++_inline' @@ -94,10 +94,10 @@ elif PLATFORM == 'iar': AFLAGS += ' --cpu Cortex-M4' AFLAGS += ' --fpu None' - LFLAGS = ' --config stm32f10x_flash.icf' + LFLAGS = ' --config gd32_rom.icf' LFLAGS += ' --redirect _Printf=_PrintfTiny' LFLAGS += ' --redirect _Scanf=_ScanfSmall' LFLAGS += ' --entry __iar_program_start' - EXEC_PATH = IAR_PATH + '/arm/bin/' + EXEC_PATH += '/arm/bin/' POST_ACTION = '' diff --git a/bsp/gd32450z-eval/template.uvprojx b/bsp/gd32450z-eval/template.uvprojx index 0b826dcd0..d9e889bb9 100644 --- a/bsp/gd32450z-eval/template.uvprojx +++ b/bsp/gd32450z-eval/template.uvprojx @@ -321,7 +321,7 @@ 0 0 0 - 0 + 1 0 1 1 -- GitLab