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2f7d9d43
编写于
9月 05, 2019
作者:
Nameless-Y
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操作
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电子邮件补丁
差异文件
[bsp][stm32/libraries] update STM32F0xx_HAL lib to V1.10.1
上级
03f8762e
变更
12
展开全部
隐藏空白更改
内联
并排
Showing
12 changed file
with
5156 addition
and
2100 deletion
+5156
-2100
bsp/stm32/libraries/STM32F0xx_HAL/CMSIS/Include/core_cm0.h
bsp/stm32/libraries/STM32F0xx_HAL/CMSIS/Include/core_cm0.h
+1
-1
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
...xx_HAL/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+686
-368
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/Legacy/stm32f0xx_hal_can_legacy.h
...TM32F0xx_HAL_Driver/Inc/Legacy/stm32f0xx_hal_can_legacy.h
+794
-0
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h
...TM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h
+386
-421
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
...TM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
+3
-3
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dac.h
...STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dac.h
+4
-4
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
...STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
+19
-19
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/Legacy/stm32f0xx_hal_can.c
...x_HAL/STM32F0xx_HAL_Driver/Src/Legacy/stm32f0xx_hal_can.c
+1691
-0
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c
...es/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c
+2
-2
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c
...TM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c
+1555
-1271
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c
...32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c
+10
-6
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c
...0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c
+5
-5
未找到文件。
bsp/stm32/libraries/STM32F0xx_HAL/CMSIS/Include/core_cm0.h
浏览文件 @
2f7d9d43
...
...
@@ -575,7 +575,7 @@ typedef struct
\ingroup CMSIS_core_register
\defgroup CMSIS_core_base Core Definitions
\brief Definitions for base addresses, unions, and structures.
@
@
{
*/
/* Memory mapping of Cortex-M0 Hardware */
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
浏览文件 @
2f7d9d43
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/Legacy/stm32f0xx_hal_can_legacy.h
0 → 100644
浏览文件 @
2f7d9d43
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h
浏览文件 @
2f7d9d43
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
浏览文件 @
2f7d9d43
...
...
@@ -375,10 +375,10 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
*/
/* SetENDPOINT */
#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((
__IO
uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
/* GetENDPOINT */
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((
__IO
uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
...
...
@@ -390,7 +390,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @retval None
*/
#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
((((
uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType))
)))
((((
(uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType))) | USB_EP_CTR_RX | USB_EP_CTR_TX
)))
/**
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dac.h
浏览文件 @
2f7d9d43
...
...
@@ -1122,7 +1122,7 @@ __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Cha
*/
__STATIC_INLINE
void
LL_DAC_ConvertData12RightAligned
(
DAC_TypeDef
*
DACx
,
uint32_t
DAC_Channel
,
uint32_t
Data
)
{
register
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
__IO
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
MODIFY_REG
(
*
preg
,
DAC_DHR12R1_DACC1DHR
,
...
...
@@ -1147,7 +1147,7 @@ __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_
*/
__STATIC_INLINE
void
LL_DAC_ConvertData12LeftAligned
(
DAC_TypeDef
*
DACx
,
uint32_t
DAC_Channel
,
uint32_t
Data
)
{
register
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
__IO
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
MODIFY_REG
(
*
preg
,
DAC_DHR12L1_DACC1DHR
,
...
...
@@ -1172,7 +1172,7 @@ __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t
*/
__STATIC_INLINE
void
LL_DAC_ConvertData8RightAligned
(
DAC_TypeDef
*
DACx
,
uint32_t
DAC_Channel
,
uint32_t
Data
)
{
register
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
__IO
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DHR12R1
,
(
DAC_Channel
>>
DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
MODIFY_REG
(
*
preg
,
DAC_DHR8R1_DACC1DHR
,
...
...
@@ -1257,7 +1257,7 @@ __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint
*/
__STATIC_INLINE
uint32_t
LL_DAC_RetrieveOutputData
(
DAC_TypeDef
*
DACx
,
uint32_t
DAC_Channel
)
{
register
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DOR1
,
(
DAC_Channel
>>
DAC_REG_DORX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
__IO
uint32_t
*
preg
=
__DAC_PTR_REG_OFFSET
(
DACx
->
DOR1
,
(
DAC_Channel
>>
DAC_REG_DORX_REGOFFSET_BITOFFSET_POS
)
&
DAC_REG_REGOFFSET_MASK_POSBIT0
);
return
(
uint16_t
)
READ_BIT
(
*
preg
,
DAC_DOR1_DACC1DOR
);
}
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
浏览文件 @
2f7d9d43
...
...
@@ -1603,7 +1603,7 @@ __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t
__STATIC_INLINE
void
LL_TIM_OC_ConfigOutput
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
Configuration
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
CLEAR_BIT
(
*
pReg
,
(
TIM_CCMR1_CC1S
<<
SHIFT_TAB_OCxx
[
iChannel
]));
MODIFY_REG
(
TIMx
->
CCER
,
(
TIM_CCER_CC1P
<<
SHIFT_TAB_CCxP
[
iChannel
]),
(
Configuration
&
TIM_CCER_CC1P
)
<<
SHIFT_TAB_CCxP
[
iChannel
]);
...
...
@@ -1638,7 +1638,7 @@ __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel,
__STATIC_INLINE
void
LL_TIM_OC_SetMode
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
Mode
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
MODIFY_REG
(
*
pReg
,
((
TIM_CCMR1_OC1M
|
TIM_CCMR1_CC1S
)
<<
SHIFT_TAB_OCxx
[
iChannel
]),
Mode
<<
SHIFT_TAB_OCxx
[
iChannel
]);
}
...
...
@@ -1667,7 +1667,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint
__STATIC_INLINE
uint32_t
LL_TIM_OC_GetMode
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
return
(
READ_BIT
(
*
pReg
,
((
TIM_CCMR1_OC1M
|
TIM_CCMR1_CC1S
)
<<
SHIFT_TAB_OCxx
[
iChannel
]))
>>
SHIFT_TAB_OCxx
[
iChannel
]);
}
...
...
@@ -1807,7 +1807,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Chan
__STATIC_INLINE
void
LL_TIM_OC_EnableFast
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
SET_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1FE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1829,7 +1829,7 @@ __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
__STATIC_INLINE
void
LL_TIM_OC_DisableFast
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
CLEAR_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1FE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1851,7 +1851,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
__STATIC_INLINE
uint32_t
LL_TIM_OC_IsEnabledFast
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
uint32_t
bitfield
=
TIM_CCMR1_OC1FE
<<
SHIFT_TAB_OCxx
[
iChannel
];
return
(
READ_BIT
(
*
pReg
,
bitfield
)
==
bitfield
);
}
...
...
@@ -1873,7 +1873,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Cha
__STATIC_INLINE
void
LL_TIM_OC_EnablePreload
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
SET_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1PE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1894,7 +1894,7 @@ __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel
__STATIC_INLINE
void
LL_TIM_OC_DisablePreload
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
CLEAR_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1PE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1915,7 +1915,7 @@ __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channe
__STATIC_INLINE
uint32_t
LL_TIM_OC_IsEnabledPreload
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
uint32_t
bitfield
=
TIM_CCMR1_OC1PE
<<
SHIFT_TAB_OCxx
[
iChannel
];
return
(
READ_BIT
(
*
pReg
,
bitfield
)
==
bitfield
);
}
...
...
@@ -1940,7 +1940,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t
__STATIC_INLINE
void
LL_TIM_OC_EnableClear
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
SET_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1CE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1963,7 +1963,7 @@ __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
__STATIC_INLINE
void
LL_TIM_OC_DisableClear
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
CLEAR_BIT
(
*
pReg
,
(
TIM_CCMR1_OC1CE
<<
SHIFT_TAB_OCxx
[
iChannel
]));
}
...
...
@@ -1988,7 +1988,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
__STATIC_INLINE
uint32_t
LL_TIM_OC_IsEnabledClear
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
uint32_t
bitfield
=
TIM_CCMR1_OC1CE
<<
SHIFT_TAB_OCxx
[
iChannel
];
return
(
READ_BIT
(
*
pReg
,
bitfield
)
==
bitfield
);
}
...
...
@@ -2185,7 +2185,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
__STATIC_INLINE
void
LL_TIM_IC_Config
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
Configuration
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
MODIFY_REG
(
*
pReg
,
((
TIM_CCMR1_IC1F
|
TIM_CCMR1_IC1PSC
|
TIM_CCMR1_CC1S
)
<<
SHIFT_TAB_ICxx
[
iChannel
]),
((
Configuration
>>
16U
)
&
(
TIM_CCMR1_IC1F
|
TIM_CCMR1_IC1PSC
|
TIM_CCMR1_CC1S
))
<<
SHIFT_TAB_ICxx
[
iChannel
]);
MODIFY_REG
(
TIMx
->
CCER
,
((
TIM_CCER_CC1NP
|
TIM_CCER_CC1P
)
<<
SHIFT_TAB_CCxP
[
iChannel
]),
...
...
@@ -2213,7 +2213,7 @@ __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint3
__STATIC_INLINE
void
LL_TIM_IC_SetActiveInput
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
ICActiveInput
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
MODIFY_REG
(
*
pReg
,
((
TIM_CCMR1_CC1S
)
<<
SHIFT_TAB_ICxx
[
iChannel
]),
(
ICActiveInput
>>
16U
)
<<
SHIFT_TAB_ICxx
[
iChannel
]);
}
...
...
@@ -2237,7 +2237,7 @@ __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channe
__STATIC_INLINE
uint32_t
LL_TIM_IC_GetActiveInput
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
return
((
READ_BIT
(
*
pReg
,
((
TIM_CCMR1_CC1S
)
<<
SHIFT_TAB_ICxx
[
iChannel
]))
>>
SHIFT_TAB_ICxx
[
iChannel
])
<<
16U
);
}
...
...
@@ -2263,7 +2263,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Ch
__STATIC_INLINE
void
LL_TIM_IC_SetPrescaler
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
ICPrescaler
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
MODIFY_REG
(
*
pReg
,
((
TIM_CCMR1_IC1PSC
)
<<
SHIFT_TAB_ICxx
[
iChannel
]),
(
ICPrescaler
>>
16U
)
<<
SHIFT_TAB_ICxx
[
iChannel
]);
}
...
...
@@ -2288,7 +2288,7 @@ __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel,
__STATIC_INLINE
uint32_t
LL_TIM_IC_GetPrescaler
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
return
((
READ_BIT
(
*
pReg
,
((
TIM_CCMR1_IC1PSC
)
<<
SHIFT_TAB_ICxx
[
iChannel
]))
>>
SHIFT_TAB_ICxx
[
iChannel
])
<<
16U
);
}
...
...
@@ -2326,7 +2326,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Chan
__STATIC_INLINE
void
LL_TIM_IC_SetFilter
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
,
uint32_t
ICFilter
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
MODIFY_REG
(
*
pReg
,
((
TIM_CCMR1_IC1F
)
<<
SHIFT_TAB_ICxx
[
iChannel
]),
(
ICFilter
>>
16U
)
<<
SHIFT_TAB_ICxx
[
iChannel
]);
}
...
...
@@ -2363,7 +2363,7 @@ __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, ui
__STATIC_INLINE
uint32_t
LL_TIM_IC_GetFilter
(
TIM_TypeDef
*
TIMx
,
uint32_t
Channel
)
{
register
uint8_t
iChannel
=
TIM_GET_CHANNEL_INDEX
(
Channel
);
register
uint32_t
*
pReg
=
(
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
register
__IO
uint32_t
*
pReg
=
(
__IO
uint32_t
*
)((
uint32_t
)((
uint32_t
)(
&
TIMx
->
CCMR1
)
+
OFFSET_TAB_CCMRx
[
iChannel
]));
return
((
READ_BIT
(
*
pReg
,
((
TIM_CCMR1_IC1F
)
<<
SHIFT_TAB_ICxx
[
iChannel
]))
>>
SHIFT_TAB_ICxx
[
iChannel
])
<<
16U
);
}
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/Legacy/stm32f0xx_hal_can.c
0 → 100644
浏览文件 @
2f7d9d43
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c
浏览文件 @
2f7d9d43
...
...
@@ -68,11 +68,11 @@
* @{
*/
/**
* @brief STM32F0xx HAL Driver version number V1.7.
0
* @brief STM32F0xx HAL Driver version number V1.7.
2
*/
#define __STM32F0xx_HAL_VERSION_MAIN (0x01)
/*!< [31:24] main version */
#define __STM32F0xx_HAL_VERSION_SUB1 (0x07)
/*!< [23:16] sub1 version */
#define __STM32F0xx_HAL_VERSION_SUB2 (0x0
0
)
/*!< [15:8] sub2 version */
#define __STM32F0xx_HAL_VERSION_SUB2 (0x0
2
)
/*!< [15:8] sub2 version */
#define __STM32F0xx_HAL_VERSION_RC (0x00)
/*!< [7:0] release candidate */
#define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c
浏览文件 @
2f7d9d43
此差异已折叠。
点击以展开。
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c
浏览文件 @
2f7d9d43
...
...
@@ -494,18 +494,22 @@ __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
*/
HAL_StatusTypeDef
HAL_FLASH_Unlock
(
void
)
{
if
(
HAL_IS_BIT_SET
(
FLASH
->
CR
,
FLASH_CR_LOCK
))
HAL_StatusTypeDef
status
=
HAL_OK
;
if
(
READ_BIT
(
FLASH
->
CR
,
FLASH_CR_LOCK
)
!=
RESET
)
{
/* Authorize the FLASH Registers access */
WRITE_REG
(
FLASH
->
KEYR
,
FLASH_KEY1
);
WRITE_REG
(
FLASH
->
KEYR
,
FLASH_KEY2
);
}
else
{
return
HAL_ERROR
;
/* Verify Flash is unlocked */
if
(
READ_BIT
(
FLASH
->
CR
,
FLASH_CR_LOCK
)
!=
RESET
)
{
status
=
HAL_ERROR
;
}
}
return
HAL_OK
;
return
status
;
}
/**
...
...
bsp/stm32/libraries/STM32F0xx_HAL/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c
浏览文件 @
2f7d9d43
...
...
@@ -919,22 +919,22 @@ static uint32_t FLASH_OB_GetWRP(void)
*/
static
uint32_t
FLASH_OB_GetRDP
(
void
)
{
uint32_t
tmp_reg
=
0U
;
uint32_t
tmp_reg
;
/* Read RDP level bits */
tmp_reg
=
READ_BIT
(
FLASH
->
OBR
,
(
FLASH_OBR_RDPRT1
|
FLASH_OBR_RDPRT2
));
if
(
tmp_reg
==
FLASH_OBR_RDPRT1
)
if
(
tmp_reg
==
0U
)
{
return
OB_RDP_LEVEL_
1
;
return
OB_RDP_LEVEL_
0
;
}
else
if
(
tmp_reg
==
FLASH_OBR_RDPRT2
)
else
if
(
(
tmp_reg
&
FLASH_OBR_RDPRT2
)
==
FLASH_OBR_RDPRT2
)
{
return
OB_RDP_LEVEL_2
;
}
else
{
return
OB_RDP_LEVEL_
0
;
return
OB_RDP_LEVEL_
1
;
}
}
...
...
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