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体验新版 GitCode,发现更多精彩内容 >>
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15ffe884
编写于
3月 29, 2018
作者:
B
Bernard Xiong
提交者:
GitHub
3月 29, 2018
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差异文件
Merge pull request #1324 from Bluebear233/nuc472
[BSP]NUC472
上级
a18275c2
342f883a
变更
9
隐藏空白更改
内联
并排
Showing
9 changed file
with
1640 addition
and
357 deletion
+1640
-357
bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
.../Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
+3
-3
bsp/nuvoton_nuc472/README.md
bsp/nuvoton_nuc472/README.md
+1
-1
bsp/nuvoton_nuc472/drivers/board.c
bsp/nuvoton_nuc472/drivers/board.c
+2
-2
bsp/nuvoton_nuc472/drivers/nuc472_eth.c
bsp/nuvoton_nuc472/drivers/nuc472_eth.c
+3
-3
bsp/nuvoton_nuc472/ldscripts/libs.ld
bsp/nuvoton_nuc472/ldscripts/libs.ld
+0
-8
bsp/nuvoton_nuc472/ldscripts/mem.ld
bsp/nuvoton_nuc472/ldscripts/mem.ld
+0
-25
bsp/nuvoton_nuc472/ldscripts/sections.ld
bsp/nuvoton_nuc472/ldscripts/sections.ld
+71
-315
bsp/nuvoton_nuc472/project.uvproj
bsp/nuvoton_nuc472/project.uvproj
+1153
-0
bsp/nuvoton_nuc472/template.uvproj
bsp/nuvoton_nuc472/template.uvproj
+407
-0
未找到文件。
bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
浏览文件 @
15ffe884
...
...
@@ -150,9 +150,9 @@ extern unsigned char _sdata;
// End address for the .data section// defined in linker script
extern
unsigned
char
_edata
;
// Begin address for the .bss section// defined in linker script
extern
unsigned
char
__bss_start
__
;
extern
unsigned
char
__bss_start
;
// End address for the .bss section// defined in linker script
extern
unsigned
char
__bss_end
__
;
extern
unsigned
char
__bss_end
;
extern
int
entry
(
void
);
...
...
@@ -333,7 +333,7 @@ pHandler g_pfnVectors[] =
void
_start
()
{
memcpy
(
&
_sdata
,
&
_sidata
,
&
_edata
-
&
_sdata
);
memset
(
&
__bss_start
__
,
0
,
&
__bss_end__
-
&
__bss_start__
);
memset
(
&
__bss_start
,
0
,
&
__bss_end
-
&
__bss_start
);
}
static
void
Reset_Handler
(
void
)
...
...
bsp/nuvoton_nuc472/README.md
浏览文件 @
15ffe884
...
...
@@ -3,7 +3,7 @@
NuTiny-EVB-NUC472
## note:
support the GCC MDK5 IAR
support the GCC MDK
4 MDK
5 IAR
**TODO**
bsp/nuvoton_nuc472/drivers/board.c
浏览文件 @
15ffe884
...
...
@@ -22,7 +22,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern
int
__bss_end
__
;
extern
int
__bss_end
;
#endif
/**
...
...
@@ -80,7 +80,7 @@ void rt_hw_board_init(void)
rt_system_heap_init
(
__segment_end
(
"HEAP"
),
(
void
*
)
SRAM_END
);
#else
/* init memory system */
rt_system_heap_init
((
void
*
)
&
__bss_end
__
,
(
void
*
)
SRAM_END
);
rt_system_heap_init
((
void
*
)
&
__bss_end
,
(
void
*
)
SRAM_END
);
#endif
#endif
/* RT_USING_HEAP */
...
...
bsp/nuvoton_nuc472/drivers/nuc472_eth.c
浏览文件 @
15ffe884
...
...
@@ -181,7 +181,7 @@ static void init_rx_desc(rt_nuc472_emac_t emac)
emac
->
rx_desc
[
i
].
status1
=
OWNERSHIP_EMAC
;
emac
->
rx_desc
[
i
].
buf
=
&
emac
->
rx_buf
[
i
][
0
];
emac
->
rx_desc
[
i
].
status2
=
0
;
emac
->
rx_desc
[
i
].
next
=
&
emac
->
rx_desc
[(
i
+
1
)
%
T
X_DESCRIPTOR_NUM
];
emac
->
rx_desc
[
i
].
next
=
&
emac
->
rx_desc
[(
i
+
1
)
%
R
X_DESCRIPTOR_NUM
];
}
emac_base
->
RXDSA
=
(
unsigned
int
)
&
emac
->
rx_desc
[
0
];
return
;
...
...
@@ -205,8 +205,8 @@ static void set_mac_addr(rt_nuc472_emac_t emac, rt_uint8_t *addr)
void
EMAC_init
(
rt_nuc472_emac_t
emac
,
rt_uint8_t
*
mac_addr
)
{
EMAC_T
*
emac_base
=
emac
->
emac_base
;
RT_ASSERT
(
emac
->
dev_addr
!=
RT_NULL
);
EMAC_T
*
emac_base
=
emac
->
emac_base
;
CLK_EnableModuleClock
(
EMAC_MODULE
);
...
...
@@ -445,12 +445,12 @@ rt_err_t rt_nuc472_emac_tx(rt_device_t dev, struct pbuf* p)
struct
pbuf
*
rt_nuc472_emac_rx
(
rt_device_t
dev
)
{
rt_nuc472_emac_t
emac
=
(
rt_nuc472_emac_t
)
dev
;
unsigned
int
status
;
struct
pbuf
*
p
;
/* init p pointer */
p
=
RT_NULL
;
unsigned
int
status
;
status
=
emac
->
cur_rx_desc_ptr
->
status1
;
if
(
status
&
OWNERSHIP_EMAC
)
...
...
bsp/nuvoton_nuc472/ldscripts/libs.ld
已删除
100644 → 0
浏览文件 @
a18275c2
/*
* Placeholder to list other libraries required by the application.
GROUP(
)
*/
bsp/nuvoton_nuc472/ldscripts/mem.ld
已删除
100644 → 0
浏览文件 @
a18275c2
/*
* Memory Spaces Definitions.
*
* Need modifying for a specific board.
* FLASH.ORIGIN: starting address of flash
* FLASH.LENGTH: length of flash
* RAM.ORIGIN: starting address of RAM bank 0
* RAM.LENGTH: length of RAM bank 0
*
* The values below can be addressed in further linker scripts
* using functions like 'ORIGIN(RAM)' or 'LENGTH(RAM)'.
*/
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K /*4K*/
}
/*
* For external ram use something like:
RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 8K
*/
bsp/nuvoton_nuc472/ldscripts/sections.ld
浏览文件 @
15ffe884
/*
* Default linker script for Cortex-M
*
* To make use of the multi-region initialisations, define
* OS_INCLUDE_STARTUP_INIT_MULTIPLE_RAM_SECTIONS for the _startup.c file.
* linker script for STM32F10x with GNU ld
* bernard.xiong 2009-10-14
*/
/*
* The '__stack' definition is required by crt0, do not remove it.
*/
__stack = ORIGIN(RAM) + LENGTH(RAM);
_estack = __stack; /* STM specific definition */
/*
* Default stack sizes.
* These are used by the startup in order to allocate stacks
* for the different modes.
*/
__Main_Stack_Size = 1024 ;
PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;
__Main_Stack_Limit = __stack - __Main_Stack_Size ;
/* "PROVIDE" allows to easily override these values from an
* object file or the command line. */
PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;
/*
* There will be a link error if there is not this amount of
* RAM free at the end.
*/
_Minimum_Stack_Size = 256 ;
/*
* Default heap definitions.
* The heap start immediately after the last statically allocated
* .sbss/.noinit section, and extends up to the main stack limit.
*/
PROVIDE ( _Heap_Begin = _end_noinit ) ;
PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;
/*
* The entry point is informative, for debuggers and simulators,
* since the Cortex-M vector points to it anyway.
*/
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 128K sram */
DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 512KB flash */
}
ENTRY(_start)
/* Sections Definitions */
_system_stack_size = 0x400;
SECTIONS
{
/*
* For Cortex-M devices, the beginning of the startup code is stored in
* the .isr_vector section, which goes to FLASH.
*/
.isr_vector : ALIGN(4)
{
FILL(0xFF)
__vectors_start = ABSOLUTE(.) ;
__vectors_start__ = ABSOLUTE(.) ; /* STM specific definition */
KEEP(*(.isr_vector)) /* Interrupt vectors */
KEEP(*(.cfmconfig)) /* Freescale configuration words */
/*
* This section is here for convenience, to store the
* startup code at the beginning of the flash area, hoping that
* this will increase the readability of the listing.
*/
*(.after_vectors .after_vectors.*) /* Startup code and ISR */
} >FLASH
.inits : ALIGN(4)
.text :
{
/*
* Memory regions initialisation arrays.
*
* Thee are two kinds of arrays for each RAM region, one for
* data and one for bss. Each is iterrated at startup and the
* region initialisation is performed.
*
* The data array includes:
* - from (LOADADDR())
* - region_begin (ADDR())
* - region_end (ADDR()+SIZEOF())
*
* The bss array includes:
* - region_begin (ADDR())
* - region_end (ADDR()+SIZEOF())
*
* WARNING: It is mandatory that the regions are word aligned,
* since the initialisation code works only on words.
*/
__data_regions_array_start = .;
LONG(LOADADDR(.data));
LONG(ADDR(.data));
LONG(ADDR(.data)+SIZEOF(.data));
__data_regions_array_end = .;
__bss_regions_array_start = .;
LONG(ADDR(.bss));
LONG(ADDR(.bss)+SIZEOF(.bss));
__bss_regions_array_end = .;
/* End of memory regions initialisation arrays. */
/*
* These are the old initialisation sections, intended to contain
* naked code, with the prologue/epilogue added by crti.o/crtn.o
* when linking with startup files. The standalone startup code
* currently does not run these, better use the init arrays below.
*/
KEEP(*(.init))
KEEP(*(.fini))
. = ALIGN(4);
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
...
...
@@ -135,7 +38,7 @@ SECTIONS
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
...
...
@@ -143,212 +46,67 @@ SECTIONS
__rt_init_end = .;
. = ALIGN(4);
. = ALIGN(4);
_etext = .;
} > CODE = 0
/*
* The preinit code, i.e. an array of pointers to initialisation
* functions to be performed before constructors.
*/
PROVIDE_HIDDEN (__preinit_array_start = .);
/*
* Used to run the SystemInit() before anything else.
*/
KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))
/*
* Used for other platform inits.
*/
KEEP(*(.preinit_array_platform .preinit_array_platform.*))
/*
* The application inits. If you need to enforce some order in
* execution, create new sections, as before.
*/
KEEP(*(.preinit_array .preinit_array.*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/*
* The init code, i.e. an array of pointers to static constructors.
*/
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/*
* The fini code, i.e. an array of pointers to static destructors.
*/
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/*
* For some STRx devices, the beginning of the startup code
* is stored in the .flashtext section, which goes to FLASH.
*/
.flashtext : ALIGN(4)
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.flashtext .flashtext.*) /* Startup code */
} >FLASH
/*
* The program code is stored in the .text section,
* which goes to FLASH.
*/
.text : ALIGN(4)
{
*(.text .text.*) /* all remaining code */
/* read-only data (constants) */
*(.rodata .rodata.* .constdata .constdata.*)
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
*(vtable) /* C++ virtual tables */
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > CODE
__exidx_end = .;
KEEP(*(.eh_frame*))
/* .data section which is used for initialized data */
/*
* Stub sections generated by the linker, to glue together
* ARM and Thumb code. .glue_7 is used for ARM code calling
* Thumb code, and .glue_7t is used for Thumb code calling
* ARM code. Apparently always generated by the linker, for some
* architectures, so better leave them here.
*/
*(.glue_7)
*(.glue_7t)
KEEP (*(.init))
KEEP (*(.fini))
} >FLASH
/* ARM magic sections */
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
. = ALIGN(4);
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
. = ALIGN(4);
_etext = .;
__etext = .;
/* MEMORY_ARRAY */
/*
.ROarraySection :
.data : AT (_sidata)
{
*(.ROarraySection .ROarraySection.*)
} >MEMORY_ARRAY
*/
/*
* This address is used by the startup code to
* initialise the .data section.
*/
_sidata = LOADADDR(.data);
/*
* The initialised data section.
*
* The program executes knowing that the data is in the RAM
* but the loader puts the initial values in the FLASH (inidata).
* It is one task of the startup to copy the initial values from
* FLASH to RAM.
*/
.data : ALIGN(4)
{
FILL(0xFF)
/* This is used by the startup code to initialise the .data section */
_sdata = . ; /* STM specific definition */
__data_start__ = . ;
*(.data_begin .data_begin.*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data .data.*)
*(.data_end .data_end.*)
. = ALIGN(4);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
/* This is used by the startup code to initialise the .data section */
_edata = . ; /* STM specific definition */
__data_end__ = . ;
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >DATA
} >RAM AT>FLASH
/*
* The uninitialised data sections. NOLOAD is used to avoid
* the "section `.bss' type changed to PROGBITS" warning
*/
.stack :
{
_sstack = .;
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >DATA
/* The primary uninitialised data section. */
.bss
(NOLOAD) : ALIGN(4)
__bss_start = .;
.bss
:
{
__bss_start__ = .; /* standard newlib definition */
_sbss = .; /* STM specific definit
ion */
*(.bss_begin .bss_begin.*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss sec
ion */
_sbss = .;
*(.bss .bss.*)
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss_end .bss_end.*)
. = ALIGN(4);
__bss_end__ = .; /* standard newlib definition */
_ebss = . ; /* STM specific definition */
} >RAM
.noinit (NOLOAD) : ALIGN(4)
{
_noinit = .;
*(.noinit .noinit.*)
. = ALIGN(4) ;
_end_noinit = .;
} > RAM
/* Mandatory to be word aligned, _sbrk assumes this */
PROVIDE ( end = _end_noinit ); /* was _ebss */
PROVIDE ( _end = _end_noinit );
PROVIDE ( __end = _end_noinit );
PROVIDE ( __end__ = _end_noinit );
/*
* Used for validation only, do not allocate anything here!
*
* This is just to check that there is enough RAM left for the Main
* stack. It should generate an error if it's full.
*/
._check_stack : ALIGN(4)
{
. = . + _Minimum_Stack_Size ;
} >RAM
*(.bss.init)
} > DATA
__bss_end = .;
_end = .;
/* After that there are only debugging sections. */
/* This can remove the debugging information from the standard libraries */
/*
DISCARD :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
*/
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
...
...
@@ -357,11 +115,9 @@ SECTIONS
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/*
* DWARF debug sections.
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0.
*/
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
...
...
@@ -383,5 +139,5 @@ SECTIONS
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
bsp/nuvoton_nuc472/project.uvproj
0 → 100644
浏览文件 @
15ffe884
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project
xmlns:xsi=
"http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation=
"project_proj.xsd"
>
<SchemaVersion>
1.1
</SchemaVersion>
<Header>
### uVision Project, (C) Keil Software
</Header>
<Targets>
<Target>
<TargetName>
rtthread-nuc472
</TargetName>
<ToolsetNumber>
0x4
</ToolsetNumber>
<ToolsetName>
ARM-ADS
</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>
NUC472HI8AE
</Device>
<Vendor>
Nuvoton
</Vendor>
<Cpu>
IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2
</Cpu>
<FlashUtilSpec
/>
<StartupFile>
undefined
</StartupFile>
<FlashDriverDll
/>
<DeviceId>
0
</DeviceId>
<RegisterFile
/>
<MemoryEnv
/>
<Cmp
/>
<Asm
/>
<Linker
/>
<OHString
/>
<InfinionOptionDll
/>
<SLE66CMisc
/>
<SLE66AMisc
/>
<SLE66LinkerMisc
/>
<SFDFile>
SFD\Nuvoton\NUC400_v1.SFR
</SFDFile>
<bCustSvd>
0
</bCustSvd>
<UseEnv>
0
</UseEnv>
<BinPath
/>
<IncludePath
/>
<LibPath
/>
<RegisterFilePath
/>
<DBRegisterFilePath
/>
<TargetStatus>
<Error>
0
</Error>
<ExitCodeStop>
0
</ExitCodeStop>
<ButtonStop>
0
</ButtonStop>
<NotGenerated>
0
</NotGenerated>
<InvalidFlash>
1
</InvalidFlash>
</TargetStatus>
<OutputDirectory>
.\build\
</OutputDirectory>
<OutputName>
template
</OutputName>
<CreateExecutable>
1
</CreateExecutable>
<CreateLib>
0
</CreateLib>
<CreateHexFile>
1
</CreateHexFile>
<DebugInformation>
1
</DebugInformation>
<BrowseInformation>
1
</BrowseInformation>
<ListingPath>
.\build\
</ListingPath>
<HexFormatSelection>
1
</HexFormatSelection>
<Merge32K>
0
</Merge32K>
<CreateBatchFile>
0
</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>
0
</RunUserProg1>
<RunUserProg2>
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bsp/nuvoton_nuc472/template.uvproj
0 → 100644
浏览文件 @
15ffe884
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</AdsLLst>
<AdsLmap>
1
</AdsLmap>
<AdsLcgr>
1
</AdsLcgr>
<AdsLsym>
1
</AdsLsym>
<AdsLszi>
1
</AdsLszi>
<AdsLtoi>
1
</AdsLtoi>
<AdsLsun>
1
</AdsLsun>
<AdsLven>
1
</AdsLven>
<AdsLsxf>
1
</AdsLsxf>
<RvctClst>
0
</RvctClst>
<GenPPlst>
0
</GenPPlst>
<AdsCpuType>
"Cortex-M4"
</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>
0
</mOS>
<uocRom>
0
</uocRom>
<uocRam>
0
</uocRam>
<hadIROM>
1
</hadIROM>
<hadIRAM>
1
</hadIRAM>
<hadXRAM>
0
</hadXRAM>
<uocXRam>
0
</uocXRam>
<RvdsVP>
2
</RvdsVP>
<hadIRAM2>
0
</hadIRAM2>
<hadIROM2>
0
</hadIROM2>
<StupSel>
8
</StupSel>
<useUlib>
0
</useUlib>
<EndSel>
0
</EndSel>
<uLtcg>
0
</uLtcg>
<RoSelD>
3
</RoSelD>
<RwSelD>
3
</RwSelD>
<CodeSel>
0
</CodeSel>
<OptFeed>
0
</OptFeed>
<NoZi1>
0
</NoZi1>
<NoZi2>
0
</NoZi2>
<NoZi3>
0
</NoZi3>
<NoZi4>
0
</NoZi4>
<NoZi5>
0
</NoZi5>
<Ro1Chk>
0
</Ro1Chk>
<Ro2Chk>
0
</Ro2Chk>
<Ro3Chk>
0
</Ro3Chk>
<Ir1Chk>
1
</Ir1Chk>
<Ir2Chk>
0
</Ir2Chk>
<Ra1Chk>
0
</Ra1Chk>
<Ra2Chk>
0
</Ra2Chk>
<Ra3Chk>
0
</Ra3Chk>
<Im1Chk>
1
</Im1Chk>
<Im2Chk>
0
</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm1>
<Ocm2>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm2>
<Ocm3>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm3>
<Ocm4>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm4>
<Ocm5>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm5>
<Ocm6>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm6>
<IRAM>
<Type>
0
</Type>
<StartAddress>
0x20000000
</StartAddress>
<Size>
0x10000
</Size>
</IRAM>
<IROM>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x80000
</Size>
</IROM>
<XRAM>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</XRAM>
<OCR_RVCT1>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x80000
</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>
0
</Type>
<StartAddress>
0x20000000
</StartAddress>
<Size>
0x10000
</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>
1
</interw>
<Optim>
1
</Optim>
<oTime>
0
</oTime>
<SplitLS>
0
</SplitLS>
<OneElfS>
0
</OneElfS>
<Strict>
0
</Strict>
<EnumInt>
0
</EnumInt>
<PlainCh>
0
</PlainCh>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<wLevel>
0
</wLevel>
<uThumb>
0
</uThumb>
<uSurpInc>
0
</uSurpInc>
<uC99>
0
</uC99>
<useXO>
0
</useXO>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>
1
</interw>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<thumb>
0
</thumb>
<SplitLS>
0
</SplitLS>
<SwStkChk>
0
</SwStkChk>
<NoWarn>
0
</NoWarn>
<uSurpInc>
0
</uSurpInc>
<useXO>
0
</useXO>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>
1
</umfTarg>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<noStLib>
0
</noStLib>
<RepFail>
1
</RepFail>
<useFile>
0
</useFile>
<TextAddressRange>
0x00000000
</TextAddressRange>
<DataAddressRange>
0x20000000
</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
</Target>
</Targets>
</Project>
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