diff --git a/bsp/gd32e230k-start/.config b/bsp/gd32e230k-start/.config index 40cac74cf78db94e83a5d0eaa3405485f5a360b4..8f18d4257eabc045e8f68939fa0b9fff330320de 100644 --- a/bsp/gd32e230k-start/.config +++ b/bsp/gd32e230k-start/.config @@ -7,20 +7,32 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y # CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 -CONFIG_RT_DEBUG=y -CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y -CONFIG_RT_DEBUG_INIT=0 -CONFIG_RT_DEBUG_THREAD=0 CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set # # Inter-Thread communication @@ -47,11 +59,13 @@ CONFIG_RT_USING_HEAP=y # Kernel Device Object # CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -# CONFIG_RT_USING_MODULE is not set +CONFIG_RT_VER_NUM=0x40001 +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components @@ -59,6 +73,7 @@ CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_USING_COMPONENTS_INIT=y CONFIG_RT_USING_USER_MAIN=y CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 # # C++ features @@ -82,67 +97,58 @@ CONFIG_FINSH_CMD_SIZE=80 CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_USING_MSH_DEFAULT=y # CONFIG_FINSH_USING_MSH_ONLY is not set +CONFIG_FINSH_ARG_MAX=10 # # Device virtual file system # -CONFIG_RT_USING_DFS=y -CONFIG_DFS_USING_WORKDIR=y -CONFIG_DFS_FILESYSTEMS_MAX=2 -CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 -CONFIG_DFS_FD_MAX=4 -CONFIG_RT_USING_DFS_ELMFAT=y - -# -# elm-chan's FatFs, Generic FAT Filesystem Module -# -CONFIG_RT_DFS_ELM_CODE_PAGE=437 -CONFIG_RT_DFS_ELM_WORD_ACCESS=y -CONFIG_RT_DFS_ELM_USE_LFN_0=y +# CONFIG_RT_USING_DFS is not set +# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set # CONFIG_RT_DFS_ELM_USE_LFN_1 is not set # CONFIG_RT_DFS_ELM_USE_LFN_2 is not set # CONFIG_RT_DFS_ELM_USE_LFN_3 is not set -CONFIG_RT_DFS_ELM_USE_LFN=0 -CONFIG_RT_DFS_ELM_MAX_LFN=255 -CONFIG_RT_DFS_ELM_DRIVES=2 -CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096 -# CONFIG_RT_DFS_ELM_USE_ERASE is not set -CONFIG_RT_DFS_ELM_REENTRANT=y -CONFIG_RT_USING_DFS_DEVFS=y -# CONFIG_RT_USING_DFS_NET is not set -# CONFIG_RT_USING_DFS_ROMFS is not set -# CONFIG_RT_USING_DFS_RAMFS is not set -# CONFIG_RT_USING_DFS_UFFS is not set -# CONFIG_RT_USING_DFS_JFFS2 is not set -# CONFIG_RT_USING_DFS_NFS is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set CONFIG_RT_USING_I2C=y # CONFIG_RT_USING_I2C_BITOPS is not set CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set CONFIG_RT_USING_SPI=y +# CONFIG_RT_USING_QSPI is not set # CONFIG_RT_USING_SPI_MSD is not set CONFIG_RT_USING_SFUD=y # CONFIG_RT_SFUD_USING_SFDP is not set CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y -# CONFIG_RT_SFUD_DEBUG is not set +# CONFIG_RT_SFUD_USING_QSPI is not set +# CONFIG_RT_DEBUG_SFUD is not set # CONFIG_RT_USING_W25QXX is not set # CONFIG_RT_USING_GD is not set # CONFIG_RT_USING_ENC28J60 is not set # CONFIG_RT_USING_SPI_WIFI is not set # CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set + +# +# Using WiFi +# # CONFIG_RT_USING_WIFI is not set # @@ -154,27 +160,33 @@ CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y # # POSIX layer and C standard library # -CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_LIBC is not set # CONFIG_RT_USING_PTHREADS is not set -# CONFIG_RT_USING_POSIX is not set -# CONFIG_HAVE_SYS_SIGNALS is not set # -# Network stack +# Network # +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + # # light weight TCP/IP stack # # CONFIG_RT_USING_LWIP is not set -# CONFIG_RT_USING_LWIP141 is not set -# CONFIG_RT_USING_LWIP202 is not set # # Modbus master and slave stack # # CONFIG_RT_USING_MODBUS is not set +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + # # VBUS(Virtual Software BUS) # @@ -185,25 +197,13 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set # # RT-Thread online packages # -# -# system packages -# - -# -# RT-Thread GUI Engine -# -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set -# CONFIG_PKG_USING_LITTLEVGL2RTT is not set - # # IoT - internet of things # @@ -212,10 +212,10 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set # # Wi-Fi @@ -233,7 +233,16 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# # CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set # # security packages @@ -245,6 +254,7 @@ CONFIG_RT_USING_LIBC=y # # language packages # +# CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -252,6 +262,7 @@ CONFIG_RT_USING_LIBC=y # multimedia packages # # CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set # # tools packages @@ -260,17 +271,58 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set -# CONFIG_PKG_USING_IPERF is not set +# CONFIG_PKG_USING_RDB is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set # # miscellaneous packages # +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_MULTIBUTTON is not set -# CONFIG_PKG_USING_SAMPLES is not set # CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set + +# +# sample package +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # # example package: hello @@ -283,6 +335,5 @@ CONFIG_RT_USING_USART1=y # CONFIG_RT_USING_UART4 is not set CONFIG_RT_USING_SPI0=y CONFIG_RT_USING_SPI1=y -# CONFIG_RT_USING_SPI2 is not set CONFIG_RT_USING_I2C0=y # CONFIG_RT_USING_I2C1 is not set diff --git a/bsp/gd32e230k-start/Kconfig b/bsp/gd32e230k-start/Kconfig index e4706f4d4fb547e88beb2332ae4ddb0370006b64..36b2d0eeb1d4ed68e65609ea60430194ef12d875 100644 --- a/bsp/gd32e230k-start/Kconfig +++ b/bsp/gd32e230k-start/Kconfig @@ -53,11 +53,6 @@ config RT_USING_SPI1 select RT_USING_SPI default n -config RT_USING_SPI2 - bool "Using SPI2" - select RT_USING_SPI - default n - config RT_USING_I2C0 bool "Using I2C0" select RT_USING_I2C diff --git a/bsp/gd32e230k-start/drivers/drv_gpio.c b/bsp/gd32e230k-start/drivers/drv_gpio.c index 6b9ecf4e3476ba34ddf75cf4b3b7f144596e1937..288ba6c8323763b29ed9e55053f4a56e15e84e2f 100644 --- a/bsp/gd32e230k-start/drivers/drv_gpio.c +++ b/bsp/gd32e230k-start/drivers/drv_gpio.c @@ -1,16 +1,17 @@ /* * File : drv_gpio.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2015, RT-Thread Development Team + * COPYRIGHT (C) 2019, RT-Thread Development Team * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rt-thread.org/license/LICENSE * * Change Logs: - * Date Author Notes + * Date Author Notes * 2017-10-20 ZYH the first version * 2018-04-23 misonyo port to gd32f30x + * 2019-03-31 xuzhuoyi Porting for gd32e230 */ #include "drv_gpio.h" @@ -23,7 +24,7 @@ #define __GD32_PIN(index, port, pin) {index, RCU_GPIO##port, GPIO##port, \ GPIO_PIN_##pin, EXTI_SOURCE_GPIO##port, EXTI_SOURCE_PIN##pin} -#define __GD32_PIN_DEFAULT {-1, (rcu_periph_enum)0, 0, 0} +#define __GD32_PIN_DEFAULT {-1, (rcu_periph_enum)0, 0, 0, 0, 0} /* GD32 GPIO driver */ struct pin_index @@ -39,102 +40,37 @@ struct pin_index static const struct pin_index pins[] = { __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(7, C, 13), - __GD32_PIN(8, C, 14), - __GD32_PIN(9, C, 15), - __GD32_PIN(10, F, 0), - __GD32_PIN(11, F, 1), - __GD32_PIN(12, F, 2), - __GD32_PIN(13, F, 3), - __GD32_PIN(14, F, 4), - __GD32_PIN(15, F, 5), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(18, F, 6), - __GD32_PIN(19, F, 7), - __GD32_PIN(20, F, 8), - __GD32_PIN(21, F, 9), - __GD32_PIN(22, F, 10), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(26, C, 0), - __GD32_PIN(27, C, 1), - __GD32_PIN(28, C, 2), - __GD32_PIN(29, C, 3), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(34, A, 0), - __GD32_PIN(35, A, 1), - __GD32_PIN(36, A, 2), - __GD32_PIN(37, A, 3), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(40, A, 4), - __GD32_PIN(41, A, 5), - __GD32_PIN(42, A, 6), - __GD32_PIN(43, A, 7), - __GD32_PIN(44, C, 4), - __GD32_PIN(45, C, 5), - __GD32_PIN(46, B, 0), - __GD32_PIN(47, B, 1), - __GD32_PIN(48, B, 2), - __GD32_PIN(49, F, 11), - __GD32_PIN(50, F, 12), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(53, F, 13), - __GD32_PIN(54, F, 14), - __GD32_PIN(55, F, 15), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(69, B, 10), - __GD32_PIN(70, B, 11), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(73, B, 12), - __GD32_PIN(74, B, 13), - __GD32_PIN(75, B, 14), - __GD32_PIN(76, B, 15), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(96, C, 6), - __GD32_PIN(97, C, 7), - __GD32_PIN(98, C, 8), - __GD32_PIN(99, C, 9), - __GD32_PIN(100, A, 8), - __GD32_PIN(101, A, 9), - __GD32_PIN(102, A, 10), - __GD32_PIN(103, A, 11), - __GD32_PIN(104, A, 12), - __GD32_PIN(105, A, 13), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(109, A, 14), - __GD32_PIN(110, A, 15), - __GD32_PIN(111, C, 10), - __GD32_PIN(112, C, 11), - __GD32_PIN(113, C, 12), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, - __GD32_PIN(133, B, 3), - __GD32_PIN(134, B, 4), - __GD32_PIN(135, B, 5), - __GD32_PIN(136, B, 6), - __GD32_PIN(137, B, 7), - __GD32_PIN_DEFAULT, - __GD32_PIN(139, B, 8), - __GD32_PIN(140, B, 9), - __GD32_PIN_DEFAULT, - __GD32_PIN_DEFAULT, + __GD32_PIN(2, F, 0), + __GD32_PIN(3, F, 1), + __GD32_PIN_DEFAULT, + __GD32_PIN_DEFAULT, + __GD32_PIN(6, A, 0), + __GD32_PIN(7, A, 1), + __GD32_PIN(8, A, 2), + __GD32_PIN(9, A, 3), + __GD32_PIN(10, A, 4), + __GD32_PIN(11, A, 5), + __GD32_PIN(12, A, 6), + __GD32_PIN(13, A, 7), + __GD32_PIN(14, B, 0), + __GD32_PIN(15, B, 1), + __GD32_PIN(16, B, 2), + __GD32_PIN_DEFAULT, + __GD32_PIN(18, A, 8), + __GD32_PIN(19, A, 9), + __GD32_PIN(20, A, 10), + __GD32_PIN(21, A, 11), + __GD32_PIN(22, A, 12), + __GD32_PIN(23, A, 13), + __GD32_PIN(24, A, 14), + __GD32_PIN(25, A, 15), + __GD32_PIN(26, B, 3), + __GD32_PIN(27, B, 4), + __GD32_PIN(28, B, 5), + __GD32_PIN(29, B, 6), + __GD32_PIN(30, B, 7), + __GD32_PIN_DEFAULT, + __GD32_PIN(32, B, 8), }; struct pin_irq_map diff --git a/bsp/gd32e230k-start/drivers/drv_i2c.c b/bsp/gd32e230k-start/drivers/drv_i2c.c index c0fbd5f7e9a8b0bc2082acabb37486de14d65813..78ddd99bdda76d2fe8e6d6e169cf3e3f8c29a9f5 100644 --- a/bsp/gd32e230k-start/drivers/drv_i2c.c +++ b/bsp/gd32e230k-start/drivers/drv_i2c.c @@ -1,7 +1,7 @@ /* * File : drv_i2c.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team + * COPYRIGHT (C) 2006 - 2019, RT-Thread Development Team * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,6 +21,7 @@ * Date Author Notes * 2017-06-05 tanek first implementation. * 2018-04-19 misonyo Porting for gd32f30x + * 2019-03-31 xuzhuoyi Porting for gd32e230 */ #include "drv_i2c.h" diff --git a/bsp/gd32e230k-start/drivers/drv_spi.c b/bsp/gd32e230k-start/drivers/drv_spi.c index 7c749d75e06a7f6e9ce87339ee88b5caf0f1bbf9..1611b1d338ff58f85fe5c2d199c5611ef19fca77 100644 --- a/bsp/gd32e230k-start/drivers/drv_spi.c +++ b/bsp/gd32e230k-start/drivers/drv_spi.c @@ -1,7 +1,7 @@ /* * File : drv_spi.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2017 RT-Thread Develop Team + * COPYRIGHT (C) 2019 RT-Thread Develop Team * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -11,6 +11,7 @@ * Date Author Notes * 2017-06-05 tanek first implementation. * 2018-04-19 misonyo Porting for gd32f30x + * 2019-03-31 xuzhuoyi Porting for gd32e230 */ #include "drv_spi.h" @@ -20,8 +21,7 @@ #if defined(RT_USING_SPI) && defined(RT_USING_PIN) #include -#if !defined(RT_USING_SPI0) && !defined(RT_USING_SPI1) && \ - !defined(RT_USING_SPI2) +#if !defined(RT_USING_SPI0) && !defined(RT_USING_SPI1) #error "Please define at least one SPIx" #endif diff --git a/bsp/gd32e230k-start/drivers/drv_usart.c b/bsp/gd32e230k-start/drivers/drv_usart.c index c34ca232cbdc7c7211c01c2788efc144e4952afb..eef2f741b83d51a3cdeeebcdccd772a78b9c0fa1 100644 --- a/bsp/gd32e230k-start/drivers/drv_usart.c +++ b/bsp/gd32e230k-start/drivers/drv_usart.c @@ -11,6 +11,7 @@ * Date Author Notes * 2009-01-05 Bernard the first version * 2018-04-19 misonyo Porting for gd32f30x + * 2019-03-31 xuzhuoyi Porting for gd32e230 */ #include @@ -23,9 +24,7 @@ #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) -#if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) && \ - !defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \ - !defined(RT_USING_UART4) +#if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) #error "Please define at least one UARTx" #endif @@ -84,53 +83,6 @@ void USART1_IRQHandler(void) #endif /* RT_USING_UART1 */ -#if defined(RT_USING_USART2) -struct rt_serial_device serial2; - -void USART2_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - uart_isr(&serial2); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -#endif /* RT_USING_UART2 */ - -#if defined(RT_USING_UART3) -struct rt_serial_device serial3; - -void UART3_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - uart_isr(&serial3); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -#endif /* RT_USING_UART3 */ - -#if defined(RT_USING_UART4) -struct rt_serial_device serial4; - -void UART4_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - uart_isr(&serial4); - - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif /* RT_USING_UART4 */ - static const struct gd32_uart uarts[] = { #ifdef RT_USING_USART0 { @@ -155,42 +107,6 @@ static const struct gd32_uart uarts[] = { "uart1", }, #endif - - #ifdef RT_USING_USART2 - { - USART2, // uart peripheral index - USART2_IRQn, // uart iqrn - RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock - GPIOB, GPIO_PIN_10, // tx port, tx alternate, tx pin - GPIOB, GPIO_PIN_11, // rx port, rx alternate, rx pin - &serial2, - "uart2", - }, - #endif - - #ifdef RT_USING_UART3 - { - UART3, // uart peripheral index - UART3_IRQn, // uart iqrn - RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock - GPIOC, GPIO_PIN_10, // tx port, tx alternate, tx pin - GPIOC, GPIO_PIN_11, // rx port, rx alternate, rx pin - &serial3, - "uart3", - }, - #endif - - #ifdef RT_USING_UART4 - { - UART4, // uart peripheral index - UART4_IRQn, // uart iqrn - RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock - GPIOC, GPIO_PIN_12, // tx port, tx alternate, tx pin - GPIOD, GPIO_PIN_2, // rx port, rx alternate, rx pin - &serial4, - "uart4", - }, - #endif }; diff --git a/bsp/gd32e230k-start/project.uvoptx b/bsp/gd32e230k-start/project.uvoptx index aa084f2049f5fcc642b902a9a3a8f6157fedb01a..5da1234dd34af361410a651958f49fdf5b6b55d2 100644 --- a/bsp/gd32e230k-start/project.uvoptx +++ b/bsp/gd32e230k-start/project.uvoptx @@ -103,7 +103,7 @@ 1 0 0 - 14 + 19 @@ -384,7 +384,7 @@ Drivers - 0 + 1 0 0 0 diff --git a/bsp/gd32e230k-start/project.uvprojx b/bsp/gd32e230k-start/project.uvprojx index 4466ae7d451aaa90d02348d4d81a65728ea80e38..115df957babf723918912bf73c5493bc7ded8d39 100644 --- a/bsp/gd32e230k-start/project.uvprojx +++ b/bsp/gd32e230k-start/project.uvprojx @@ -10,7 +10,7 @@ rt-thread_gd32e230 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC + 6120000::V6.12::.\ARMCLANG 1 @@ -312,10 +312,10 @@ 1 - 1 + 7 0 0 - 0 + 1 0 0 0 @@ -684,9 +684,9 @@ 2 2 - --c99 - - + + + diff --git a/bsp/gd32e230k-start/rtconfig.h b/bsp/gd32e230k-start/rtconfig.h index b490faaf8aead1c9bd078728ccc1c33c3224d6ac..ef5a6509f7ead20735ac1afb1ffce4f4768e677d 100644 --- a/bsp/gd32e230k-start/rtconfig.h +++ b/bsp/gd32e230k-start/rtconfig.h @@ -148,8 +148,13 @@ /* miscellaneous packages */ +/* sample package */ + /* samples: kernel and components samples */ + +/* example package: hello */ + #define RT_USING_USART0 #define RT_USING_USART1 #define RT_USING_SPI0 diff --git a/bsp/gd32e230k-start/template.uvoptx b/bsp/gd32e230k-start/template.uvoptx index 93d9c266ef02f77bfeff47bf7beffd2b6e3a8621..090bdb9227f025f3052c826ad6e581a9232d6e0b 100644 --- a/bsp/gd32e230k-start/template.uvoptx +++ b/bsp/gd32e230k-start/template.uvoptx @@ -103,7 +103,7 @@ 1 0 0 - 14 + 19 diff --git a/bsp/gd32e230k-start/template.uvprojx b/bsp/gd32e230k-start/template.uvprojx index cf0ba886d11d068871fe0ce0cbd4f4f317b06230..43c9f16629f1527e73a9fcbb9f84f222f55c80ea 100644 --- a/bsp/gd32e230k-start/template.uvprojx +++ b/bsp/gd32e230k-start/template.uvprojx @@ -312,10 +312,10 @@ 1 - 1 + 7 0 0 - 0 + 1 0 0 0 diff --git a/libcpu/arm/cortex-m23/context_gcc.S b/libcpu/arm/cortex-m23/context_gcc.S index d9993247e298a3efac2e6df233c1f43f6e83d764..4fc5a3adbd040bad28d9134216f5455e4e96e2c3 100644 --- a/libcpu/arm/cortex-m23/context_gcc.S +++ b/libcpu/arm/cortex-m23/context_gcc.S @@ -1,19 +1,20 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2019, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: - * Date Author Notes + * Date Author Notes * 2010-01-25 Bernard first version * 2012-06-01 aozima set pendsv priority to 0xFF. * 2012-08-17 aozima fixed bug: store r8 - r11. * 2013-02-20 aozima port to gcc. * 2013-06-18 aozima add restore MSP feature. * 2013-11-04 bright fixed hardfault bug for gcc. + * 2019-03-31 xuzhuoyi port to Cortex-M23. */ - .cpu cortex-m0 + .cpu cortex-m23 .fpu softvfp .syntax unified .thumb diff --git a/libcpu/arm/cortex-m23/context_iar.S b/libcpu/arm/cortex-m23/context_iar.S index 50d378135916b2c85a3be00e87fecbd7fb0d7e23..4f30c0bc0c74bf3de7362ed415014bb167050b00 100644 --- a/libcpu/arm/cortex-m23/context_iar.S +++ b/libcpu/arm/cortex-m23/context_iar.S @@ -1,5 +1,5 @@ ;/* -; * Copyright (c) 2006-2018, RT-Thread Development Team +; * Copyright (c) 2006-2019, RT-Thread Development Team ; * ; * SPDX-License-Identifier: Apache-2.0 ; * @@ -9,10 +9,11 @@ ; * 2012-06-01 aozima set pendsv priority to 0xFF. ; * 2012-08-17 aozima fixed bug: store r8 - r11. ; * 2013-06-18 aozima add restore MSP feature. +; * 2019-03-31 xuzhuoyi port to Cortex-M23. ; */ ;/** -; * @addtogroup CORTEX-M0 +; * @addtogroup CORTEX-M23 ; */ ;/*@{*/ diff --git a/libcpu/arm/cortex-m23/context_rvds.S b/libcpu/arm/cortex-m23/context_rvds.S index 54145773d38d8a5d46e4e3c77585c11338ff6767..f243097cc60f110c68c658c22d150c5afcce6bf2 100644 --- a/libcpu/arm/cortex-m23/context_rvds.S +++ b/libcpu/arm/cortex-m23/context_rvds.S @@ -1,5 +1,5 @@ ;/* -; * Copyright (c) 2006-2018, RT-Thread Development Team +; * Copyright (c) 2006-2019, RT-Thread Development Team ; * ; * SPDX-License-Identifier: Apache-2.0 ; * @@ -9,6 +9,7 @@ ; * 2012-06-01 aozima set pendsv priority to 0xFF. ; * 2012-08-17 aozima fixed bug: store r8 - r11. ; * 2013-06-18 aozima add restore MSP feature. +; * 2019-03-31 xuzhuoyi port to Cortex-M23. ; */ ;/** diff --git a/libcpu/arm/cortex-m23/cpuport.c b/libcpu/arm/cortex-m23/cpuport.c index 5d36fa11fe5cc59055f913d83d3a90ce55641ce6..842802c866ea0cb6ea99094ca5d01a65906bca7f 100644 --- a/libcpu/arm/cortex-m23/cpuport.c +++ b/libcpu/arm/cortex-m23/cpuport.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2019, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -9,6 +9,7 @@ * 2012-05-31 aozima Merge all of the C source code into cpuport.c * 2012-08-17 aozima fixed bug: store r8 - r11. * 2012-12-23 aozima stack addr align to 8byte. + * 2019-03-31 xuzhuoyi port to Cortex-M23. */ #include