From 97d8f14aebd3f55f2de01742fbf4caac01fc614e Mon Sep 17 00:00:00 2001
From: luhuadong <luhuadong@163.com>
Date: Thu, 27 Jun 2019 17:14:03 +0800
Subject: [PATCH] =?UTF-8?q?=E8=B0=83=E6=95=B4=E7=BC=A9=E8=BF=9B?=
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---
 bsp/stm32/stm32f767-st-nucleo/board/Kconfig   | 28 +++++++++----------
 .../board/ports/phy_reset.c                   | 12 ++++----
 2 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/bsp/stm32/stm32f767-st-nucleo/board/Kconfig b/bsp/stm32/stm32f767-st-nucleo/board/Kconfig
index 920138393f..6bb14b0a83 100644
--- a/bsp/stm32/stm32f767-st-nucleo/board/Kconfig
+++ b/bsp/stm32/stm32f767-st-nucleo/board/Kconfig
@@ -12,24 +12,24 @@ menu "Onboard Peripheral Drivers"
         select BSP_USING_UART3
         default y
         
-	config BSP_USING_ETH
-		bool "Enable Ethernet"
-		select RT_USING_LWIP
-		default n
+    config BSP_USING_ETH
+        bool "Enable Ethernet"
+        select RT_USING_LWIP
+        default n
 
-		if BSP_USING_ETH
-			choice
-				prompt "On-board PHY chip"
-				default PHY_USING_LAN8720A
+        if BSP_USING_ETH
+            choice
+                prompt "On-board PHY chip"
+                default PHY_USING_LAN8720A
 
-				config PHY_USING_LAN8720A
-					bool "LAN8720A"
+                config PHY_USING_LAN8720A
+                    bool "LAN8720A"
 
-				config PHY_USING_DM9161CEP
-					bool "DM9161CEP"
+                config PHY_USING_DM9161CEP
+                    bool "DM9161CEP"
 
-			endchoice
-		endif
+            endchoice
+        endif
  
 endmenu
 
diff --git a/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c b/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c
index 012d5a81eb..8a833eec2a 100644
--- a/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c
+++ b/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c
@@ -12,10 +12,10 @@
 
 void phy_reset(void)
 {
-	/*
-	 * The PHY reset pin of NUCLEO-F767ZI is connected to the MCU reset pin,
-	 * so no additional reset is required.
-	 */
-	
-	return ;
+    /*
+     * The PHY reset pin of NUCLEO-F767ZI is connected to the MCU reset pin,
+     * so no additional reset is required.
+     */
+    
+    return ;
 }
-- 
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